rom.fit.eqn

我用VHDL写的正弦

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--JB1_q_a[0] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[0] at M4K_X27_Y10
--RAM Block Operation Mode: ROM
--Port A Depth: 64, Port A Width: 8
--Port A Logical Depth: 64, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0] = JB1_q_a[0]_PORT_A_data_out_reg[0];

--JB1_q_a[7] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[7] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[7] = JB1_q_a[0]_PORT_A_data_out_reg[7];

--JB1_q_a[6] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[6] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[6] = JB1_q_a[0]_PORT_A_data_out_reg[6];

--JB1_q_a[5] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[5] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[5] = JB1_q_a[0]_PORT_A_data_out_reg[5];

--JB1_q_a[4] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[4] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[4] = JB1_q_a[0]_PORT_A_data_out_reg[4];

--JB1_q_a[3] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[3] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[3] = JB1_q_a[0]_PORT_A_data_out_reg[3];

--JB1_q_a[2] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[2] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[2] = JB1_q_a[0]_PORT_A_data_out_reg[2];

--JB1_q_a[1] is romexam:u1|altsyncram:altsyncram_component|altsyncram_s731:auto_generated|q_a[1] at M4K_X27_Y10
JB1_q_a[0]_PORT_A_address = BUS(q1[0], q1[1], q1[2], q1[3], q1[4], q1[5]);
JB1_q_a[0]_PORT_A_address_reg = DFFE(JB1_q_a[0]_PORT_A_address, JB1_q_a[0]_clock_0, , , );
JB1_q_a[0]_clock_0 = GLOBAL(A1L16);
JB1_q_a[0]_PORT_A_data_out = MEMORY(, , JB1_q_a[0]_PORT_A_address_reg, , , , , , JB1_q_a[0]_clock_0, , , , , );
JB1_q_a[0]_PORT_A_data_out_reg = DFFE(JB1_q_a[0]_PORT_A_data_out, JB1_q_a[0]_clock_0, , , );
JB1_q_a[1] = JB1_q_a[0]_PORT_A_data_out_reg[1];


--A1L7 is altera_internal_jtag~TDO at JTAG_X1_Y10_N0
A1L7 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L19);

--A1L8 is altera_internal_jtag~TMSUTAP at JTAG_X1_Y10_N0
A1L8 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L19);

--A1L5 is altera_internal_jtag~TCKUTAP at JTAG_X1_Y10_N0
A1L5 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L19);

--altera_internal_jtag is altera_internal_jtag at JTAG_X1_Y10_N0
altera_internal_jtag = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L19);


--q1[0] is q1[0] at LCFF_X26_Y11_N11
q1[0] = DFFEAS(A1L31, GLOBAL(A1L16),  ,  ,  ,  ,  , A1L27,  );


--q1[1] is q1[1] at LCFF_X26_Y11_N13
q1[1] = DFFEAS(A1L34, GLOBAL(A1L16),  ,  ,  ,  ,  , A1L27,  );


--q1[2] is q1[2] at LCFF_X26_Y11_N15
q1[2] = DFFEAS(A1L37, GLOBAL(A1L16),  ,  ,  ,  ,  , A1L27,  );


--q1[3] is q1[3] at LCFF_X26_Y11_N17
q1[3] = DFFEAS(A1L40, GLOBAL(A1L16),  ,  ,  ,  ,  , A1L27,  );


--q1[4] is q1[4] at LCFF_X26_Y11_N19
q1[4] = DFFEAS(A1L43, GLOBAL(A1L16),  ,  ,  ,  ,  , A1L27,  );


--q1[5] is q1[5] at LCFF_X26_Y11_N21
q1[5] = DFFEAS(A1L46, GLOBAL(A1L16),  ,  ,  ,  ,  , A1L27,  );


--C1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo at LCFF_X29_Y9_N5
C1_hub_tdo = AMPP_FUNCTION(!A1L6, C1L17, !GB1_state[8]);


--A1L31 is q1[0]~122 at LCCOMB_X26_Y11_N10
A1L31 = q1[0] $ VCC;

--A1L32 is q1[0]~123 at LCCOMB_X26_Y11_N10
A1L32 = CARRY(q1[0]);


--A1L26 is LessThan~76 at LCCOMB_X26_Y11_N28
A1L26 = !q1[0] # !q1[3] # !q1[2] # !q1[1];


--A1L27 is LessThan~77 at LCCOMB_X26_Y11_N26
A1L27 = q1[4] & q1[5] & !A1L26;


--A1L34 is q1[1]~124 at LCCOMB_X26_Y11_N12
A1L34 = q1[1] & !A1L32 # !q1[1] & (A1L32 # GND);

--A1L35 is q1[1]~125 at LCCOMB_X26_Y11_N12
A1L35 = CARRY(!A1L32 # !q1[1]);


--A1L37 is q1[2]~126 at LCCOMB_X26_Y11_N14
A1L37 = q1[2] & (A1L35 $ GND) # !q1[2] & !A1L35 & VCC;

--A1L38 is q1[2]~127 at LCCOMB_X26_Y11_N14
A1L38 = CARRY(q1[2] & !A1L35);


--A1L40 is q1[3]~128 at LCCOMB_X26_Y11_N16
A1L40 = q1[3] & !A1L38 # !q1[3] & (A1L38 # GND);

--A1L41 is q1[3]~129 at LCCOMB_X26_Y11_N16
A1L41 = CARRY(!A1L38 # !q1[3]);


--A1L43 is q1[4]~130 at LCCOMB_X26_Y11_N18
A1L43 = q1[4] & (A1L41 $ GND) # !q1[4] & !A1L41 & VCC;

--A1L44 is q1[4]~131 at LCCOMB_X26_Y11_N18
A1L44 = CARRY(q1[4] & !A1L41);


--A1L46 is q1[5]~132 at LCCOMB_X26_Y11_N20
A1L46 = q1[5] $ A1L44;


--C1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1 at LCFF_X25_Y9_N19
C1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L6, A1L48, GB1L3, GB1_state[12]);


--EB3_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] at LCFF_X28_Y9_N31
EB3_Q[0] = AMPP_FUNCTION(A1L6, C1L29, C1L3, EB3L4);


--GB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] at LCFF_X29_Y7_N27
GB1_state[3] = AMPP_FUNCTION(A1L6, GB1L20);


--GB1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] at LCFF_X28_Y9_N5
GB1_state[4] = AMPP_FUNCTION(A1L6, GB1L21, A1L8);


--GB1L22 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 at LCCOMB_X29_Y9_N14
GB1L22 = AMPP_FUNCTION(GB1_state[4], GB1_state[3]);


--C1L11 is sld_hub:sld_hub_inst|hub_tdo~448 at LCCOMB_X29_Y9_N8
C1L11 = AMPP_FUNCTION(EB3_Q[0], GB1L22, C1_hub_tdo, C1_jtag_debug_mode_usr1);


--B1L45 is sld_signaltap:rom1|comb~37 at LCCOMB_X29_Y9_N18
B1L45 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, GB1_state[4], GB1_state[3]);


--EB7_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] at LCFF_X29_Y7_N25
EB7_Q[0] = AMPP_FUNCTION(A1L6, EB7L3, C1L25);


--G2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] at LCFF_X28_Y8_N5
G2_WORD_SR[0] = AMPP_FUNCTION(A1L6, G2L29, G2L22);


--C1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG at LCFF_X28_Y9_N15
C1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L6, C1L9);


--HB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[0] at LCFF_X25_Y9_N15
HB1_dffe1a[0] = AMPP_FUNCTION(A1L6, HB1_w_anode1w[3], C1L3, C1L5);


--C1L12 is sld_hub:sld_hub_inst|hub_tdo~449 at LCCOMB_X29_Y9_N28
C1L12 = AMPP_FUNCTION(C1_HUB_BYPASS_REG, G2_WORD_SR[0], HB1_dffe1a[0]);


--C1L13 is sld_hub:sld_hub_inst|hub_tdo~450 at LCCOMB_X29_Y9_N20
C1L13 = AMPP_FUNCTION(C1L11, C1L12, EB7_Q[0], B1L45);


--B1_bypass_reg_out is sld_signaltap:rom1|bypass_reg_out at LCFF_X24_Y9_N21
B1_bypass_reg_out = AMPP_FUNCTION(A1L6, B1L44, !B1L48);


--EB4_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5] at LCFF_X28_Y7_N21
EB4_Q[5] = AMPP_FUNCTION(A1L6, C1L24, C1L3, C1L28);


--EB4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] at LCFF_X28_Y7_N3
EB4_Q[3] = AMPP_FUNCTION(A1L6, C1L22, C1L3, C1L28);


--EB4_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[4] at LCFF_X28_Y7_N23
EB4_Q[4] = AMPP_FUNCTION(A1L6, C1L23, C1L3, C1L28);


--C1L14 is sld_hub:sld_hub_inst|hub_tdo~451 at LCCOMB_X29_Y9_N0
C1L14 = AMPP_FUNCTION(EB4_Q[5], EB4_Q[4], EB4_Q[3], B1_bypass_reg_out);


--L1_dffs[0] is sld_signaltap:rom1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0] at LCFF_X29_Y9_N31
L1_dffs[0] = AMPP_FUNCTION(A1L6, L1_dffs[1], !B1L48, GND, H1_trigger_setup_ena);


--G1_WORD_SR[0] is sld_signaltap:rom1|sld_rom_sr:crc_rom_sr|WORD_SR[0] at LCFF_X29_Y8_N21
G1_WORD_SR[0] = AMPP_FUNCTION(A1L6, G1L22, G1L18);


--C1L15 is sld_hub:sld_hub_inst|hub_tdo~452 at LCCOMB_X29_Y9_N30
C1L15 = AMPP_FUNCTION(EB4_Q[5], EB4_Q[3], L1_dffs[0], G1_WORD_SR[0]);


--L4_dffs[0] is sld_signaltap:rom1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0] at LCFF_X25_Y7_N25
L4_dffs[0] = AMPP_FUNCTION(A1L6, L4L1, !B1L48);


--C1L16 is sld_hub:sld_hub_inst|hub_tdo~453 at LCCOMB_X29_Y9_N2
C1L16 = AMPP_FUNCTION(C1L14, EB4_Q[4], L4_dffs[0], C1L15);


--EB6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] at LCFF_X29_Y7_N19
EB6_Q[0] = AMPP_FUNCTION(A1L6, altera_internal_jtag, C1L3, GND, C1L25);