ps2tolcd.fit.qmsg

VHDL语言实现的程序

{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.176 ns register register " "Info: Estimated most critical path is register to register delay of 2.176 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ps2_keyboard_interface:inst3\|rx_released 1 REG LAB_X31_Y18 15 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X31_Y18; Fanout = 15; REG Node = 'ps2_keyboard_interface:inst3\|rx_released'" {  } { { "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" "" { Report "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" Compiler "ps2tolcd" "UNKNOWN" "V1" "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd.quartus_db" { Floorplan "E:/code/EP2C35/S9_PS2_LCD/PROJ/" "" "" { ps2_keyboard_interface:inst3|rx_released } "NODE_NAME" } "" } } { "../SRC/ps2_keyboard.v" "" { Text "E:/code/EP2C35/S9_PS2_LCD/SRC/ps2_keyboard.v" 188 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.856 ns) + CELL(0.210 ns) 2.066 ns lcd:inst2\|lcd_e~12 2 COMB LAB_X32_Y10 1 " "Info: 2: + IC(1.856 ns) + CELL(0.210 ns) = 2.066 ns; Loc. = LAB_X32_Y10; Fanout = 1; COMB Node = 'lcd:inst2\|lcd_e~12'" {  } { { "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" "" { Report "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" Compiler "ps2tolcd" "UNKNOWN" "V1" "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd.quartus_db" { Floorplan "E:/code/EP2C35/S9_PS2_LCD/PROJ/" "" "2.066 ns" { ps2_keyboard_interface:inst3|rx_released lcd:inst2|lcd_e~12 } "NODE_NAME" } "" } } { "../SRC/lcd.v" "" { Text "E:/code/EP2C35/S9_PS2_LCD/SRC/lcd.v" 4 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.110 ns) 2.176 ns lcd:inst2\|lcd_e 3 REG LAB_X32_Y10 2 " "Info: 3: + IC(0.000 ns) + CELL(0.110 ns) = 2.176 ns; Loc. = LAB_X32_Y10; Fanout = 2; REG Node = 'lcd:inst2\|lcd_e'" {  } { { "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" "" { Report "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" Compiler "ps2tolcd" "UNKNOWN" "V1" "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd.quartus_db" { Floorplan "E:/code/EP2C35/S9_PS2_LCD/PROJ/" "" "0.110 ns" { lcd:inst2|lcd_e~12 lcd:inst2|lcd_e } "NODE_NAME" } "" } } { "../SRC/lcd.v" "" { Text "E:/code/EP2C35/S9_PS2_LCD/SRC/lcd.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.320 ns 14.71 % " "Info: Total cell delay = 0.320 ns ( 14.71 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.856 ns 85.29 % " "Info: Total interconnect delay = 1.856 ns ( 85.29 % )" {  } {  } 0}  } { { "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" "" { Report "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd_cmp.qrpt" Compiler "ps2tolcd" "UNKNOWN" "V1" "E:/code/EP2C35/S9_PS2_LCD/PROJ/db/ps2tolcd.quartus_db" { Floorplan "E:/code/EP2C35/S9_PS2_LCD/PROJ/" "" "2.176 ns" { ps2_keyboard_interface:inst3|rx_released lcd:inst2|lcd_e~12 lcd:inst2|lcd_e } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}