📄 shift_taps_gkn.tdf
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--altshift_taps CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" NUMBER_OF_TAPS=2 TAP_DISTANCE=1280 WIDTH=10 clken clock shiftin shiftout taps CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO"
--VERSION_BEGIN 8.0 cbx_altdpram 2008:03:07:257777 cbx_altshift_taps 2008:02:23:252825 cbx_altsyncram 2008:03:26:267331 cbx_cycloneii 2008:02:23:252825 cbx_lpm_add_sub 2008:03:09:257947 cbx_lpm_compare 2008:02:23:252825 cbx_lpm_counter 2008:02:23:252825 cbx_lpm_decode 2008:02:23:252825 cbx_lpm_mux 2008:02:23:252825 cbx_mgl 2008:04:11:273944 cbx_stratix 2008:02:23:252825 cbx_stratixii 2008:02:23:252825 cbx_stratixiii 2008:04:23:278548 cbx_util_mgl 2008:04:15:275689 VERSION_END
-- Copyright (C) 1991-2008 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
FUNCTION altsyncram_4m81 (address_a[10..0], address_b[10..0], clock0, clocken0, data_a[19..0], wren_a)
RETURNS ( q_b[19..0]);
FUNCTION cntr_3rf (clk_en, clock)
RETURNS ( q[10..0]);
--synthesis_resources = lut 18 M4K 10 reg 11
SUBDESIGN shift_taps_gkn
(
clken : input;
clock : input;
shiftin[9..0] : input;
shiftout[9..0] : output;
taps[19..0] : output;
)
VARIABLE
altsyncram2 : altsyncram_4m81;
cntr1 : cntr_3rf;
BEGIN
altsyncram2.address_a[] = cntr1.q[];
altsyncram2.address_b[] = cntr1.q[];
altsyncram2.clock0 = clock;
altsyncram2.clocken0 = clken;
altsyncram2.data_a[] = ( altsyncram2.q_b[9..0], shiftin[]);
altsyncram2.wren_a = B"1";
cntr1.clk_en = clken;
cntr1.clock = clock;
shiftout[9..0] = altsyncram2.q_b[19..10];
taps[] = altsyncram2.q_b[];
END;
--VALID FILE
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