de2_lcm_ccd.fit.qmsg

在altera DE2 的开发板上采集图像

{ "Info" "ITAN_TDC_USER_OPTIMIZATION_GOALS" "" "Info: Detected fmax, tsu, tco, and/or tpd requirements -- optimizing circuit to achieve only the specified requirements" {  } {  } 0 0 "Detected fmax, tsu, tco, and/or tpd requirements -- optimizing circuit to achieve only the specified requirements" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLOCK_50 (placed in PIN N2 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node CLOCK_50 (placed in PIN N2 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_AV_Config:u9\|mI2C_CTRL_CLK " "Info: Destination node I2C_AV_Config:u9\|mI2C_CTRL_CLK" {  } { { "I2C_AV_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_AV_Config.v" 16 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_AV_Config:u9|mI2C_CTRL_CLK } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_LCM_Config:u8\|I2S_Controller:u0\|mI2S_CLK " "Info: Destination node I2S_LCM_Config:u8\|I2S_Controller:u0\|mI2S_CLK" {  } { { "I2S_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2S_Controller.v" 96 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_LCM_Config:u8|I2S_Controller:u0|mI2S_CLK } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "CLK_ODD " "Info: Destination node CLK_ODD" {  } { { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 401 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLK_ODD } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_CCD_Config:u7\|mI2C_CTRL_CLK " "Info: Destination node I2C_CCD_Config:u7\|mI2C_CTRL_CLK" {  } { { "I2C_CCD_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_CCD_Config.v" 18 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_CCD_Config:u7|mI2C_CTRL_CLK } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { CLOCK_50 } } } { "c:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLOCK_50" } } } } { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 174 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_50 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_USER_GLOBAL_TO_SIGNAL" "GPIO_1\[10\]~5  " "Info: Promoted node GPIO_1\[10\]~5 " { { "Info" "IFSAC_FSAC_ASSIGN_USER_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { GPIO_1[10] } } } { "c:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } } { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 296 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { GPIO_1[10] } "NODE_NAME" } }  } 0 0 "Promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_PIN_USES_INTERNAL_GLOBAL" "GPIO_1\[10\] Global Clock " "Info: Pin GPIO_1\[10\] drives global or regional clock Global Clock, but is not placed in a dedicated clock pin position" {  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { GPIO_1[10] } } } { "c:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } } { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 296 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { GPIO_1[10] } "NODE_NAME" } }  } 0 0 "Pin %1!s! drives global or regional clock %2!s!, but is not placed in a dedicated clock pin position" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Sdram_Control_4Port:u6\|Sdram_PLL:sdram_pll1\|altpll:altpll_component\|_clk0 (placed in counter C0 of PLL_1) " "Info: Automatically promoted node Sdram_Control_4Port:u6\|Sdram_PLL:sdram_pll1\|altpll:altpll_component\|_clk0 (placed in counter C0 of PLL_1)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G3 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0}  } { { "altpll.tdf" "" { Text "c:/altera/80/quartus/libraries/megafunctions/altpll.tdf" 523 3 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Sdram_Control_4Port:u6\|Sdram_PLL:sdram_pll1\|altpll:altpll_component\|_clk1 (placed in counter C2 of PLL_1) " "Info: Automatically promoted node Sdram_Control_4Port:u6\|Sdram_PLL:sdram_pll1\|altpll:altpll_component\|_clk1 (placed in counter C2 of PLL_1)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations External Clock Output CLKCTRL_X0_Y1_N1 " "Info: Automatically promoted destinations to use location or clock signal External Clock Output CLKCTRL_X0_Y1_N1" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0}  } { { "altpll.tdf" "" { Text "c:/altera/80/quartus/libraries/megafunctions/altpll.tdf" 523 3 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLK_ODD  " "Info: Automatically promoted node CLK_ODD " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "GPIO_0\[29\] " "Info: Destination node GPIO_0\[29\]" {  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { GPIO_0[29] } } } { "c:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "GPIO_0\[29\]" } } } } { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 295 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { GPIO_0[29] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "CLK_ODD~6 " "Info: Destination node CLK_ODD~6" {  } { { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 401 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLK_ODD~6 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 401 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLK_ODD } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_AV_Config:u9\|mI2C_CTRL_CLK  " "Info: Automatically promoted node I2C_AV_Config:u9\|mI2C_CTRL_CLK " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_AV_Config:u9\|I2C_Controller:u0\|I2C_SCLK~255 " "Info: Destination node I2C_AV_Config:u9\|I2C_Controller:u0\|I2C_SCLK~255" {  } { { "I2C_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2C_Controller.v" 62 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_AV_Config:u9|I2C_Controller:u0|I2C_SCLK~255 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_AV_Config:u9\|mI2C_CTRL_CLK~79 " "Info: Destination node I2C_AV_Config:u9\|mI2C_CTRL_CLK~79" {  } { { "I2C_AV_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_AV_Config.v" 16 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_AV_Config:u9|mI2C_CTRL_CLK~79 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "I2C_AV_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_AV_Config.v" 16 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_AV_Config:u9|mI2C_CTRL_CLK } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_CCD_Config:u7\|mI2C_CTRL_CLK  " "Info: Automatically promoted node I2C_CCD_Config:u7\|mI2C_CTRL_CLK " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_CCD_Config:u7\|I2C_Controller:u0\|I2C_SCLK~255 " "Info: Destination node I2C_CCD_Config:u7\|I2C_Controller:u0\|I2C_SCLK~255" {  } { { "I2C_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2C_Controller.v" 62 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_CCD_Config:u7|I2C_Controller:u0|I2C_SCLK~255 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_CCD_Config:u7\|mI2C_CTRL_CLK~79 " "Info: Destination node I2C_CCD_Config:u7\|mI2C_CTRL_CLK~79" {  } { { "I2C_CCD_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_CCD_Config.v" 18 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_CCD_Config:u7|mI2C_CTRL_CLK~79 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "I2C_CCD_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_CCD_Config.v" 18 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_CCD_Config:u7|mI2C_CTRL_CLK } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2S_LCM_Config:u8\|I2S_Controller:u0\|mI2S_CLK  " "Info: Automatically promoted node I2S_LCM_Config:u8\|I2S_Controller:u0\|mI2S_CLK " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_LCM_Config:u8\|I2S_Controller:u0\|I2S_CLK " "Info: Destination node I2S_LCM_Config:u8\|I2S_Controller:u0\|I2S_CLK" {  } { { "I2S_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2S_Controller.v" 66 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_LCM_Config:u8|I2S_Controller:u0|I2S_CLK } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_LCM_Config:u8\|I2S_Controller:u0\|mI2S_CLK~77 " "Info: Destination node I2S_LCM_Config:u8\|I2S_Controller:u0\|mI2S_CLK~77" {  } { { "I2S_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2S_Controller.v" 96 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_LCM_Config:u8|I2S_Controller:u0|mI2S_CLK~77 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "I2S_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2S_Controller.v" 96 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_LCM_Config:u8|I2S_Controller:u0|mI2S_CLK } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}