prev_cmp_de2_lcm_ccd.fit.qmsg

在altera DE2 的开发板上采集图像

{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "KEY\[1\] (placed in PIN N23 (LVDS126p, DPCLK7/DQS0R/CQ1R)) " "Info: Automatically promoted node KEY\[1\] (placed in PIN N23 (LVDS126p, DPCLK7/DQS0R/CQ1R))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G4 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G4" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SPI_Control:u11\|irq " "Info: Destination node SPI_Control:u11\|irq" {  } { { "SPI_Control.v" "" { Text "D:/DE2_LCM_CCD/SPI_Control.v" 26 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { SPI_Control:u11|irq } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_CCD_Config:u7\|mI2C_DATA\[15\]~352 " "Info: Destination node I2C_CCD_Config:u7\|mI2C_DATA\[15\]~352" {  } { { "I2C_CCD_Config.v" "" { Text "D:/DE2_LCM_CCD/I2C_CCD_Config.v" 96 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_CCD_Config:u7|mI2C_DATA[15]~352 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_CCD_Config:u7\|I2C_Controller:u0\|SD\[15\]~187 " "Info: Destination node I2C_CCD_Config:u7\|I2C_Controller:u0\|SD\[15\]~187" {  } { { "I2C_Controller.v" "" { Text "D:/DE2_LCM_CCD/I2C_Controller.v" 98 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_CCD_Config:u7|I2C_Controller:u0|SD[15]~187 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { KEY[1] } } } { "c:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "KEY\[1\]" } } } } { "DE2_LCM_CCD.v" "" { Text "D:/DE2_LCM_CCD/DE2_LCM_CCD.v" 177 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { KEY[1] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Reset_Delay:u2\|oRST_0  " "Info: Automatically promoted node Reset_Delay:u2\|oRST_0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|mWR~213 " "Info: Destination node Sdram_Control_4Port:u6\|mWR~213" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 134 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|mWR~213 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Reset_Delay:u2\|oRST_0~31 " "Info: Destination node Reset_Delay:u2\|oRST_0~31" {  } { { "Reset_Delay.v" "" { Text "D:/DE2_LCM_CCD/Reset_Delay.v" 4 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Reset_Delay:u2|oRST_0~31 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rRD1_ADDR\[9\]~426 " "Info: Destination node Sdram_Control_4Port:u6\|rRD1_ADDR\[9\]~426" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rRD1_ADDR[9]~426 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rRD1_ADDR\[9\]~429 " "Info: Destination node Sdram_Control_4Port:u6\|rRD1_ADDR\[9\]~429" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rRD1_ADDR[9]~429 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rWR2_ADDR\[12\]~443 " "Info: Destination node Sdram_Control_4Port:u6\|rWR2_ADDR\[12\]~443" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rWR2_ADDR[12]~443 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rWR2_ADDR\[12\]~447 " "Info: Destination node Sdram_Control_4Port:u6\|rWR2_ADDR\[12\]~447" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rWR2_ADDR[12]~447 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rRD2_ADDR\[22\]~406 " "Info: Destination node Sdram_Control_4Port:u6\|rRD2_ADDR\[22\]~406" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rRD2_ADDR[22]~406 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rRD2_ADDR\[22\]~409 " "Info: Destination node Sdram_Control_4Port:u6\|rRD2_ADDR\[22\]~409" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rRD2_ADDR[22]~409 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rWR1_ADDR\[10\]~428 " "Info: Destination node Sdram_Control_4Port:u6\|rWR1_ADDR\[10\]~428" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rWR1_ADDR[10]~428 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Sdram_Control_4Port:u6\|rWR1_ADDR\[10\]~431 " "Info: Destination node Sdram_Control_4Port:u6\|rWR1_ADDR\[10\]~431" {  } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "D:/DE2_LCM_CCD/Sdram_Control_4Port/Sdram_Control_4Port.v" 477 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|rWR1_ADDR[10]~431 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "Reset_Delay.v" "" { Text "D:/DE2_LCM_CCD/Reset_Delay.v" 4 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Reset_Delay:u2|oRST_0 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Reset_Delay:u2\|oRST_1  " "Info: Automatically promoted node Reset_Delay:u2\|oRST_1 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Reset_Delay:u2\|oRST_1~54 " "Info: Destination node Reset_Delay:u2\|oRST_1~54" {  } { { "Reset_Delay.v" "" { Text "D:/DE2_LCM_CCD/Reset_Delay.v" 5 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Reset_Delay:u2|oRST_1~54 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "Reset_Delay.v" "" { Text "D:/DE2_LCM_CCD/Reset_Delay.v" 5 -1 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Reset_Delay:u2|oRST_1 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Sdram_Control_4Port:u6\|Sdram_FIFO:write_fifo1\|dcfifo:dcfifo_component\|dcfifo_m2o1:auto_generated\|dffpipe_ngh:rdaclr\|dffe7a\[0\]  " "Info: Automatically promoted node Sdram_Control_4Port:u6\|Sdram_FIFO:write_fifo1\|dcfifo:dcfifo_component\|dcfifo_m2o1:auto_generated\|dffpipe_ngh:rdaclr\|dffe7a\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0}  } { { "db/dffpipe_ngh.tdf" "" { Text "D:/DE2_LCM_CCD/db/dffpipe_ngh.tdf" 32 8 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|Sdram_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_m2o1:auto_generated|dffpipe_ngh:rdaclr|dffe7a[0] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Sdram_Control_4Port:u6\|Sdram_FIFO:write_fifo2\|dcfifo:dcfifo_component\|dcfifo_m2o1:auto_generated\|dffpipe_ngh:rdaclr\|dffe7a\[0\]  " "Info: Automatically promoted node Sdram_Control_4Port:u6\|Sdram_FIFO:write_fifo2\|dcfifo:dcfifo_component\|dcfifo_m2o1:auto_generated\|dffpipe_ngh:rdaclr\|dffe7a\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0}  } { { "db/dffpipe_ngh.tdf" "" { Text "D:/DE2_LCM_CCD/db/dffpipe_ngh.tdf" 32 8 0 } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sdram_Control_4Port:u6|Sdram_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_m2o1:auto_generated|dffpipe_ngh:rdaclr|dffe7a[0] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0 "" 0 0}