de2_lcm_ccd.tan.summary

在altera DE2 的开发板上采集图像

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.072 ns
From           : KEY[0]
To             : I2C_AV_Config:u9|I2C_Controller:u0|SD[1]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 14.280 ns
From           : I2S_LCM_Config:u8|I2S_Controller:u0|mST[4]
To             : GPIO_0[34]
From Clock     : CLOCK_50
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 9.836 ns
From           : SW[14]
To             : LEDR[14]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 3.809 ns
From           : SW[10]
To             : I2C_CCD_Config:u7|mI2C_DATA[2]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0'
Slack          : 3.323 ns
Required Time  : 100.00 MHz ( period = 10.000 ns )
Actual Time    : 149.77 MHz ( period = 6.677 ns )
From           : Sdram_Control_4Port:u6|Sdram_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_m2o1:auto_generated|dffpipe_kec:rs_bwp|dffe8a[3]
To             : Sdram_Control_4Port:u6|WR_MASK[0]
From Clock     : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
To Clock       : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'CLOCK_50'
Slack          : 7.284 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 184.09 MHz ( period = 5.432 ns )
From           : I2S_LCM_Config:u8|mI2S_STR
To             : I2S_LCM_Config:u8|I2S_Controller:u0|mSDATA~en
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'GPIO_1[10]'
Slack          : N/A
Required Time  : None
Actual Time    : 146.13 MHz ( period = 6.843 ns )
From           : CCD_Capture:u3|Y_Cont[0]
To             : RAW2RGB:u4|mCCD_G[10]
From Clock     : GPIO_1[10]
To Clock       : GPIO_1[10]
Failed Paths   : 0

Type           : Clock Hold: 'Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0'
Slack          : 0.391 ns
Required Time  : 100.00 MHz ( period = 10.000 ns )
Actual Time    : N/A
From           : Sdram_Control_4Port:u6|command:command1|rw_flag
To             : Sdram_Control_4Port:u6|command:command1|rw_flag
From Clock     : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
To Clock       : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'CLOCK_50'
Slack          : 0.391 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : I2C_CCD_Config:u7|I2C_Controller:u0|SCLK
To             : I2C_CCD_Config:u7|I2C_Controller:u0|SCLK
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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