led.sim.qmsg

是vhdl语言

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator Quartus II " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version " "Info: Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jul 31 16:58:23 2008 " "Info: Processing started: Thu Jul 31 16:58:23 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --read_settings_files=on --write_settings_files=off led -c led " "Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off led -c led" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISDB_SOURCE_VECTOR_FILE_USED" "D:/altera/72/quartus/work/counter_clk/DIV.vwf " "Info: Using vector source file \"D:/altera/72/quartus/work/counter_clk/DIV.vwf\"" {  } {  } 0 0 "Using vector source file \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s10 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s10\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s9 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s9\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s8 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s8\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s7 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s7\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s6 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s6\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s5 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s5\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s4 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s4\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s3 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s3\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s2 " "Warning: Can't display state machine states -- register holding state machine bit \"\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_ela_control:ela_control\|sld_ela_trigger_flow_mgr:\\builtin:ela_trigger_flow_mgr_entity\|state.s2\" was synthesized away" {  } { { "../../libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 52 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|led\|clr " "Warning: Can't find signal in vector source file for input pin \"\|led\|clr\"" {  } {  } 0 0 "Can't find signal in vector source file for input pin \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|led\|en " "Warning: Can't find signal in vector source file for input pin \"\|led\|en\"" {  } {  } 0 0 "Can't find signal in vector source file for input pin \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|led\|clk " "Warning: Can't find signal in vector source file for input pin \"\|led\|clk\"" {  } {  } 0 0 "Can't find signal in vector source file for input pin \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|led\|auto_stp_external_clock_0 " "Warning: Can't find signal in vector source file for input pin \"\|led\|auto_stp_external_clock_0\"" {  } {  } 0 0 "Can't find signal in vector source file for input pin \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_FOUND" "" "Info: Inverted registers were found during simulation" { { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[7\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[7\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[1\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[1\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[5\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[5\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[4\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[4\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[3\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[3\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[6\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[6\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[2\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[2\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[0\] " "Info: Register: \|led\|sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|modified_post_count\[0\]" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0} { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|led\|sld_hub:sld_hub_inst\|hub_tdo_reg " "Info: Register: \|led\|sld_hub:sld_hub_inst\|hub_tdo_reg" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0}  } {  } 0 0 "Inverted registers were found during simulation" 0 0 "" 0}
{ "Info" "IEDS_MAX_TRANSITION_COUNT" "" "Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled" { { "Info" "IEDS_MAX_TRANSITION_COUNT_EXP" "" "Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." {  } {  } 0 0 "Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." 0 0 "" 0}  } {  } 0 0 "Option to preserve fewer signal transitions to reduce memory requirements is enabled" 0 0 "" 0}
{ "Info" "IEDS_SUB_SIMULATION_COUNT" "1 " "Info: Simulation partitioned into 1 sub-simulations" {  } {  } 0 0 "Simulation partitioned into %1!d! sub-simulations" 0 0 "" 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "      0.00 % " "Info: Simulation coverage is       0.00 %" {  } {  } 0 0 "Simulation coverage is %1!s!" 0 0 "" 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "0 " "Info: Number of transitions in simulation is 0" {  } {  } 0 0 "Number of transitions in simulation is %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 13 s Quartus II " "Info: Quartus II Simulator was successful. 0 errors, 13 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "111 " "Info: Allocated 111 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jul 31 16:58:28 2008 " "Info: Processing ended: Thu Jul 31 16:58:28 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}