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📄 hbf_da_timeshare.mdl

📁 This an interpolating by 2 half-band filter with 79 taps (40 none-zero coefficients).
💻 MDL
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12345 
		  BlockType		  Reference
		  Name			  "Input5"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [80, 502, 145, 518]
		  SourceBlock		  "bus_alteradspbuilder/Input"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Input Port"
		  bwl			  "18"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Input5"
		  ppat			  "C:\\Data\\IP\\FIR\\Samsung\\Coef_he"
"x\\DSPBuilder_test"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Input6"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [85, 582, 150, 598]
		  SourceBlock		  "bus_alteradspbuilder/Input"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Input Port"
		  bwl			  "18"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Input6"
		  ppat			  "C:\\Data\\IP\\FIR\\Samsung\\Coef_he"
"x\\DSPBuilder_test"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Input7"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [85, 667, 150, 683]
		  SourceBlock		  "bus_alteradspbuilder/Input"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Input Port"
		  bwl			  "18"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Input7"
		  ppat			  "C:\\Data\\IP\\FIR\\Samsung\\Coef_he"
"x\\DSPBuilder_test"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Input8"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [90, 747, 155, 763]
		  SourceBlock		  "bus_alteradspbuilder/Input"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Input Port"
		  bwl			  "18"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Input8"
		  ppat			  "C:\\Data\\IP\\FIR\\Samsung\\Coef_he"
"x\\DSPBuilder_test"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Input9"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [90, 827, 155, 843]
		  SourceBlock		  "bus_alteradspbuilder/Input"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Input Port"
		  bwl			  "18"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Input9"
		  ppat			  "C:\\Data\\IP\\FIR\\Samsung\\Coef_he"
"x\\DSPBuilder_test"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output1"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [405, 72, 470, 88]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output10"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [400, 812, 465, 828]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output2"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [405, 157, 470, 173]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output3"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [405, 242, 470, 258]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output4"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [410, 322, 475, 338]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output5"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [410, 402, 475, 418]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output6"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [410, 487, 475, 503]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output7"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [405, 567, 470, 583]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output8"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [405, 652, 470, 668]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Output9"
		  Description		  "Sign Binary Fractionnal"
		  Ports			  [1, 1]
		  Position		  [400, 732, 465, 748]
		  SourceBlock		  "bus_alteradspbuilder/Output"
		  SourceType		  "AltBus AlteraBlockSet"
		  sgn			  "Signed Integer"
		  nodetype		  "Output Port"
		  bwl			  "36"
		  bwr			  "0"
		  sat			  off
		  rnd			  off
		  bp			  off
		  mask_cst		  "0"
		  LocPin		  "any"
		  cst			  "0"
		  modulename		  "Output"
		  nSgCpl		  "0"
		}
		Block {
		  BlockType		  SubSystem
		  Name			  "coef_10_20"
		  Ports			  [2, 1]
		  Position		  [215, 790, 355, 850]
		  ForegroundColor	  "blue"
		  AncestorBlock		  "ALTELINK/AltLab/HDL SubSystem"
		  TreatAsAtomicUnit	  off
		  MinAlgLoopOccurrences	  off
		  RTWSystemCode		  "Auto"
		  MaskType		  "SubSystem AlteraBlockSet"
		  MaskSelfModifiable	  on
		  MaskIconFrame		  on
		  MaskIconOpaque	  on
		  MaskIconRotate	  "none"
		  MaskIconUnits		  "autoscale"
		  System {
		    Name		    "coef_10_20"
		    Location		    [2, 74, 1209, 984]
		    Open		    off
		    ModelBrowserVisibility  off
		    ModelBrowserWidth	    200
		    ScreenColor		    "white"
		    PaperOrientation	    "landscape"
		    PaperPositionMode	    "auto"
		    PaperType		    "usletter"
		    PaperUnits		    "inches"
		    ZoomFactor		    "100"
		    Block {
		    BlockType		    Inport
		    Name		    "coef_sel_bit"
		    Position		    [65, 88, 95, 102]
		    ForegroundColor	    "blue"
		    Port		    "1"
		    IconDisplay		    "Port number"
		    LatchInput		    off
		    }
		    Block {
		    BlockType		    Inport
		    Name		    "In1[17:0]"
		    Position		    [65, 133, 95, 147]
		    ForegroundColor	    "blue"
		    Port		    "2"
		    IconDisplay		    "Port number"
		    LatchInput		    off
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConcatenation"
		    Ports		    [2, 1]
		    Position		    [455, 111, 560, 149]
		    SourceBlock		    "bus_alteradspbuilder/BusConcatena"
"tion"
		    SourceType		    "Bus Concatenation AlteraBlockSet"
		    bwl			    "1"
		    bwr			    "6"
		    blean		    off
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConcatenation1"
		    Ports		    [2, 1]
		    Position		    [455, 196, 560, 234]
		    SourceBlock		    "bus_alteradspbuilder/BusConcatena"
"tion"
		    SourceType		    "Bus Concatenation AlteraBlockSet"
		    bwl			    "1"
		    bwr			    "6"
		    blean		    off
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConcatenation2"
		    Ports		    [2, 1]
		    Position		    [460, 296, 565, 334]
		    SourceBlock		    "bus_alteradspbuilder/BusConcatena"
"tion"
		    SourceType		    "Bus Concatenation AlteraBlockSet"
		    bwl			    "1"
		    bwr			    "6"
		    blean		    off
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConcatenation3"
		    Ports		    [2, 1]
		    Position		    [755, 121, 860, 159]
		    SourceBlock		    "bus_alteradspbuilder/BusConcatena"
"tion"
		    SourceType		    "Bus Concatenation AlteraBlockSet"
		    bwl			    "23"
		    bwr			    "12"
		    blean		    on
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConcatenation4"
		    Ports		    [2, 1]
		    Position		    [755, 206, 860, 244]
		    SourceBlock		    "bus_alteradspbuilder/BusConcatena"
"tion"
		    SourceType		    "Bus Concatenation AlteraBlockSet"
		    bwl			    "23"
		    bwr			    "6"
		    blean		    on
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConversion"
		    Ports		    [1, 1]
		    Position		    [245, 131, 320, 149]
		    SourceBlock		    "bus_alteradspbuilder/BusConversio"
"n"
		    SourceType		    "SubBus Altera BlockSet"
		    Inputs		    "Unsigned Integer"
		    bwl			    "18"
		    bwr			    "0"
		    Outputs		    "Unsigned Integer"
		    obwl		    "6"
		    obwr		    "0"
		    msb			    "17"
		    lsb			    "12"
		    rnd			    off
		    sat			    off
		    }
		    Block {
		    BlockType		    Reference
		    Name		    "BusConversion1"
		    Ports		    [1, 1]
		    Position		    [250, 216, 325, 234]
		    SourceBlock		    "bus_alteradspbuilder/BusConversio"
"n"
		    SourceType		    "SubB
12345

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