~~hier~~.tmp

VHDL子程序集,包括各种例程资料以及源码.

#BLOCK \ \ \ 0
#SIG C0/N5 0
#SIG CLK 0
#SIG D 0
#SIG N_CLK 0
#SIG N_D 0
#SIG N_Q 0
#SIG N_RESET 0
#SIG Q 0
#SIG RESET 0
#SIG SimGlobalReset 0
#COMP 0 C17 LUT2
#PORT I0 i 0
#PORT I1 i 0
#PORT O o 0
#COMP 0 C_CLK IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_D IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_Q OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_RESET IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 Q_reg FD_1
#PORT D i 0
#PORT C i 0
#PORT Q o 0