~~hier~~.tmp

VHDL子程序集,包括各种例程资料以及源码.

#BLOCK \ \ \ 0
#SIG C0/N12 0
#SIG C0/N18 0
#SIG C0/N24 0
#SIG C0/N6 0
#SIG C24/C3/C3 0
#SIG CLEAR 0
#SIG CLK 0
#SIG CLK_BUFGPed 0
#SIG DIN3 1
#SIG DIN2 1
#SIG DIN1 1
#SIG DIN0 1
#SIG LOAD 0
#SIG N125 0
#SIG N_CLEAR 0
#SIG N_DIN3 2
#SIG N_DIN2 2
#SIG N_DIN1 2
#SIG N_DIN0 2
#SIG N_LOAD 0
#SIG N_Q3 3
#SIG N_Q2 3
#SIG N_Q1 3
#SIG N_Q0 3
#SIG N_UP_DOWN 0
#SIG Q3 4
#SIG Q2 4
#SIG Q1 4
#SIG Q0 4
#SIG syn327 0
#SIG syn350 0
#SIG UP_DOWN 0
#SIG SimGlobalReset 0
#COMP 0 C82 LUT4
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT I3 i 0
#PORT O o 0
#COMP 0 C83 LUT4
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT I3 i 0
#PORT O o 0
#COMP 0 C84 LUT4
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT I3 i 0
#PORT O o 0
#COMP 0 C85 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C86 LUT4
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT I3 i 0
#PORT O o 0
#COMP 0 C87 LUT2
#PORT I0 i 0
#PORT I1 i 0
#PORT O o 0
#COMP 0 C88 LUT1
#PORT I0 i 0
#PORT O o 0
#COMP 0 C89 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C90 BUFGP
#PORT I i 0
#PORT O o 0
#COMP 0 C_CLEAR IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_DIN<0> IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_DIN<1> IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_DIN<2> IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_DIN<3> IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_LOAD IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_Q<0> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_Q<1> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_Q<2> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_Q<3> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_UP_DOWN IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 Q_reg<0> FDC
#PORT D i 0
#PORT C i 0
#PORT CLR i 0
#PORT Q o 0
#COMP 0 Q_reg<1> FDC
#PORT D i 0
#PORT C i 0
#PORT CLR i 0
#PORT Q o 0
#COMP 0 Q_reg<2> FDC
#PORT D i 0
#PORT C i 0
#PORT CLR i 0
#PORT Q o 0
#COMP 0 Q_reg<3> FDC
#PORT D i 0
#PORT C i 0
#PORT CLR i 0
#PORT Q o 0