updwnlo4.out

来自「VHDL子程序集,包括各种例程资料以及源码.」· OUT 代码 · 共 18 行

Reading in the Synopsys vhdl primitives.

Inferred memory devices in process 
	in routine updwnlo4 line 24 in file
         'C:/book/updwnlo4/updwnlo4/updwnlo4.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|        Q_reg        | Flip-flop |   4   |  Y  | N  | Y  | N  | N  | N  | N  |
===============================================================================

Q_reg (width 4)
---------------
    Async-reset: CLEAR'


Writing to hnl file 'c:\BOOK\UPDWNLO4\UPDWNLO4\updwnlo4/workdirs/WORK/updwnlo4.hnl'