📄 notgate.vhd
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--***********************************
-- NOT Gate Simulation *
-- Filename : NOTGATE *
--***********************************
library IEEE;
use IEEE.std_logic_1164.all;
entity notgate is
port (
A: in STD_LOGIC;
F: out STD_LOGIC
);
end notgate;
architecture notgate_arch of notgate is
begin
F <= not A;
end notgate_arch;
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