~~hier~~.tmp

VHDL子程序集,包括各种例程资料以及源码.

#BLOCK \ \ \ 0
#SIG C3/N17 0
#SIG C3/N21 0
#SIG C3/N9 0
#SIG C6/N5 0
#SIG CLK 0
#SIG CLK_BUFGPed 0
#SIG N_RESET 0
#SIG N_X 0
#SIG Present_State2 1
#SIG Present_State1 1
#SIG Present_State0 1
#SIG RESET 0
#SIG X 0
#SIG Z 0
#SIG SimGlobalReset 0
#COMP 0 C86 LUT2
#PORT I0 i 0
#PORT I1 i 0
#PORT O o 0
#COMP 0 C87 LUT4
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT I3 i 0
#PORT O o 0
#COMP 0 C88 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C89 LUT2
#PORT I0 i 0
#PORT I1 i 0
#PORT O o 0
#COMP 0 C90 BUFGP
#PORT I i 0
#PORT O o 0
#COMP 0 C_RESET IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_X IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_Z OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 Present_State_reg<0> FDC
#PORT D i 0
#PORT C i 0
#PORT CLR i 0
#PORT Q o 0
#COMP 0 Present_State_reg<1> FDC
#PORT D i 0
#PORT C i 0
#PORT CLR i 0
#PORT Q o 0
#COMP 0 Present_State_reg<2> FDP
#PORT D i 0
#PORT C i 0
#PORT PRE i 0
#PORT Q o 0