prior_if.vhd

来自「VHDL子程序集,包括各种例程资料以及源码.」· VHDL 代码 · 共 36 行

--******************************
--*  PRIORITY IF ....THEN....  *
--*    Filename : PRIOR_IF     *
--******************************

library IEEE;
use IEEE.std_logic_1164.all;

entity PRIOR_IF is
    port (
          A: in STD_LOGIC;
          B: in STD_LOGIC;
          C: in STD_LOGIC;
          X: in STD_LOGIC;
          Y: in STD_LOGIC;
          F: out STD_LOGIC
         );
end PRIOR_IF;

architecture PRIOR_IF_arch of PRIOR_IF is

begin
process (A,B,C,X,Y)

begin
    if X = '1' then
       F <= A;
    elsif Y = '1' then
       F <= B;
    else
       F <= C;        
    end if;  
end process; 

end PRIOR_IF_arch;