~~hier~~.tmp

VHDL子程序集,包括各种例程资料以及源码.

#BLOCK \ \ \ 0
#SIG A 0
#SIG B 0
#SIG C 0
#SIG C0/N9 0
#SIG F 0
#SIG N_A 0
#SIG N_B 0
#SIG N_C 0
#SIG N_X 0
#SIG N_Y 0
#SIG syn30 0
#SIG X 0
#SIG Y 0
#SIG SimGlobalReset 0
#COMP 0 C18 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C19 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C_A IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_B IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_C IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_F OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_X IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_Y IBUF
#PORT I i 0
#PORT O o 0