sh_ro.out

VHDL子程序集,包括各种例程资料以及源码.

Reading in the Synopsys vhdl primitives.

Inferred memory devices in process 
	in routine SH_RO line 22 in file
         'C:/book/sh_ro/sh_ro/sh_ro.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|      ROL1_reg       | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
|      ROR1_reg       | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
|      SLA1_reg       | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
|      SLL1_reg       | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
|      SRA1_reg       | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
|      SRL1_reg       | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
===============================================================================

ROL1_reg (width 8)
------------------
    set/reset/toggle: none


ROR1_reg (width 8)
------------------
    set/reset/toggle: none


SLA1_reg (width 8)
------------------
    set/reset/toggle: none


SLL1_reg (width 8)
------------------
    set/reset/toggle: none


SRA1_reg (width 8)
------------------
    set/reset/toggle: none


SRL1_reg (width 8)
------------------
    set/reset/toggle: none


Writing to hnl file 'c:\BOOK\SH_RO\SH_RO\sh_ro/workdirs/WORK/SH_RO.hnl'