dem4_com.vhd

VHDL子程序集,包括各种例程资料以及源码.

--******************************
--*   Component of COMPON_3    *
--*   1 To 4  Demultiplexer    *
--*    Filename : DEM4_COM     *
--******************************

library IEEE;
use IEEE.std_logic_1164.all;

entity DEM4_COM is
    port (
          DIN: in STD_LOGIC;
          S:   in STD_LOGIC_VECTOR (1 downto 0);
          Y:   out STD_LOGIC_VECTOR (0 to 3)
         );
end DEM4_COM;

architecture DEM4_COM_arch of DEM4_COM is

begin
    Y(0) <= DIN when S = "00" else '1';
    Y(1) <= DIN when S = "01" else '1';
    Y(2) <= DIN when S = "10" else '1';
    Y(3) <= DIN when S = "11" else '1';
end DEM4_COM_arch;