~~hier~~.tmp

VHDL子程序集,包括各种例程资料以及源码.

#BLOCK \ \ \ 0
#SIG C0/N10 0
#SIG C0/N16 0
#SIG C0/N22 0
#SIG C0/N28 0
#SIG DIN 0
#SIG N_DIN 0
#SIG N_S1 1
#SIG N_S0 1
#SIG S1 2
#SIG S0 2
#SIG Y3 3
#SIG Y2 3
#SIG Y1 3
#SIG Y0 3
#SIG SimGlobalReset 0
#COMP 0 C25 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C26 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C27 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C28 LUT3
#PORT I0 i 0
#PORT I1 i 0
#PORT I2 i 0
#PORT O o 0
#COMP 0 C_DIN IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_S<0> IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_S<1> IBUF
#PORT I i 0
#PORT O o 0
#COMP 0 C_Y<0> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_Y<1> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_Y<2> OBUF_S_12
#PORT I i 0
#PORT O o 0
#COMP 0 C_Y<3> OBUF_S_12
#PORT I i 0
#PORT O o 0