jk.out

来自「VHDL子程序集,包括各种例程资料以及源码.」· OUT 代码 · 共 19 行

Reading in the Synopsys vhdl primitives.

Inferred memory devices in process 
	in routine JK line 25 in file
         'C:/book/jk/jk/jk.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|      Qout_reg       | Flip-flop |   1   |  -  | -  | Y  | N  | N  | N  | Y  |
===============================================================================

Qout_reg
--------
    Async-reset: RESET
    Sync-toggle: J K


Writing to hnl file 'c:\BOOK\JK\JK\jk/workdirs/WORK/JK.hnl'