enc4_2_s.vhd

VHDL子程序集,包括各种例程资料以及源码.

--*************************************
--*  4 To 2 Encoder (WITH .. SELECT)  *
--*        Filename : ENC4_2_S        *
--*************************************

library IEEE;
use IEEE.std_logic_1164.all;

entity ENC4_2_S is
    port (
          I: in STD_LOGIC_VECTOR (0 to 3);
          Y: out STD_LOGIC_VECTOR (1 downto 0)
         );
end ENC4_2_S;

architecture ENC4_2_S_arch of ENC4_2_S is

begin
    with I select
       Y <= "00" when "1000",
            "01" when "0100",
            "10" when "0010",
            "11" when others;
end ENC4_2_S_arch;