mul2_com.vhd

VHDL子程序集,包括各种例程资料以及源码.

--****************************
--*  Component Of COMPON_1   *
--*    2 To 1 Multiplexer    *
--*   Filename : MUL2_COM    *
--****************************
  
library IEEE;
use IEEE.std_logic_1164.all;

entity MUL2_COM is
    port (
          I: in STD_LOGIC_VECTOR (0 to 1);
          S: in BIT;
          Y: out STD_LOGIC
         );
end MUL2_COM;

architecture MUL2_COM_arch of MUL2_COM is

begin
    Y <= I(0) when S = '0' else
         I(1); 
end MUL2_COM_arch;