dow_cout.vhd

来自「VHDL子程序集,包括各种例程资料以及源码.」· VHDL 代码 · 共 32 行

--*****************************
--*    HEX  DOWN Counter      *
--*    Filename : DOW_COUT    *
--*****************************
 
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;

entity DOW_COUT is
    port (
          CLK:   in STD_LOGIC;
          RESET: in STD_LOGIC;
          Q:     inout STD_LOGIC_VECTOR (0 to 3)
         );
end DOW_COUT;

architecture DOW_COUT_arch of DOW_COUT is

begin
process (CLK,Q,RESET)

begin
    if (RESET = '1') then
       Q <= "0000";
    elsif CLK'event and CLK = '1' then
       Q <= Q - 1;   
    end if;
end process;  
       
end DOW_COUT_arch;