mealy_3.out

VHDL子程序集,包括各种例程资料以及源码.

Reading in the Synopsys vhdl primitives.

Inferred memory devices in process 
	in routine MEALY_3 line 24 in file
         'C:/book/mealy_3/mealy_3/mealy_3.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|  Present_State_reg  | Flip-flop |   7   |  N  | N  | ?  | ?  | ?  | ?  | ?  |
===============================================================================

Present_State_reg<4>
--------------------
    Async-reset: RESET


Present_State_reg<0>
--------------------
    Async-reset: RESET


Present_State_reg<2>
--------------------
    Async-reset: RESET


Present_State_reg<6>
--------------------
    Async-set: RESET


Present_State_reg<3>
--------------------
    Async-reset: RESET


Present_State_reg<1>
--------------------
    Async-reset: RESET


Present_State_reg<5>
--------------------
    Async-reset: RESET


Writing to hnl file 'c:\BOOK\MEALY_3\MEALY_3\mealy_3/workdirs/WORK/MEALY_3.hnl'