moore_2.ll

VHDL子程序集,包括各种例程资料以及源码.

Revision 3
; Created by bitgen D.19 at Fri Nov 08 10:27:03 2002
; Bit lines have the following form:
; <offset> <frame number> <frame offset> <information>
; <information> may be zero or more <kw>=<value> pairs
; Block=<blockname     specifies the block associated with this
;                      memory cell.
;
; Latch=<name>         specifies the latch associated with this memory cell.
;
; Net=<netname>        specifies the user net associated with this
;                      memory cell.
;
; COMPARE=[YES | NO]   specifies whether or not it is appropriate
;                      to compare this bit position between a
;                      "program" and a "readback" bitstream.
;                      If not present the default is NO.
;
; Ram=<ram id>:<bit>   This is used in cases where a CLB function
; Rom=<ram id>:<bit>   generator is used as RAM (or ROM).  <Ram id>
;                      will be either 'F', 'G', or 'M', indicating
;                      that it is part of a single F or G function
;                      generator used as RAM, or as a single RAM
;                      (or ROM) built from both F and G.  <Bit> is
;                      a decimal number.
;
; Info lines have the following form:
; Info <name>=<value>  specifies a bit associated with the LCA
;                      configuration options, and the value of
;                      that bit.  The names of these bits may have
;                      special meaning to software reading the .ll file.
;
Info STARTSEL0=1
Bit   479194   1211     35 Block=CLB_R20C3.S1 Latch=XQ Net=Present_State<1>
Bit   481570   1217     35 Block=CLB_R20C3.S1 Latch=YQ Net=Present_State<0>
Bit   493846   1248     35 Block=CLB_R20C3.S0 Latch=YQ Net=Present_State<2>
Bit   496222   1254     35 Block=CLB_R20C3.S0 Latch=XQ Net=Present_State<3>
Bit   614612   1553     21 Block=P112 Latch=I Net=N_X
Bit   614622   1553     31 Block=P113 Latch=I Net=N_RESET