stimulus.vhd

来自「xilinx官方PCIcore 有详细说明文档」· VHDL 代码 · 共 1,210 行 · 第 1/3 页

    print(" ");
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    print(" ");
    print("Performing 64-bit initiator transfers...");
    print(" ");


    -- set up one-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000061");
    WRITE32("0111", X"20000000", X"0000000050000004");
    MOVE64;

    -- set up two-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000062");
    WRITE32("0111", X"20000000", X"0000000050000008");
    MOVE64;

    -- set up three-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000063");
    WRITE32("0111", X"20000000", X"0000000050000010");
    MOVE64;

    -- set up four-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000064");
    WRITE32("0111", X"20000000", X"000000005000001c");
    MOVE64;

    -- set up one-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000061");
    WRITE32("0111", X"20000000", X"0000000050000004");
    MOVE64;

    -- set up two-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000062");
    WRITE32("0111", X"20000000", X"0000000050000008");
    MOVE64;

    -- set up three-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000063");
    WRITE32("0111", X"20000000", X"0000000050000010");
    MOVE64;

    -- set up four-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000064");
    WRITE32("0111", X"20000000", X"000000005000001c");
    MOVE64;


    print(" ");
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    print(" ");
    print("Performing 32-bit initiator transfers from park...");
    print(" ");


    -- set up one-dataphase 32-bit initiator  read to 32-bit target
    WRITE32("0011", X"10000000", X"0000000000000061");
    WRITE32("0111", X"20000000", X"0000000040000044");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up two-dataphase 32-bit initiator  read to 32-bit target
    WRITE32("0011", X"10000000", X"0000000000000062");
    WRITE32("0111", X"20000000", X"0000000040000048");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up three-dataphase 32-bit initiator  read to 32-bit target
    WRITE32("0011", X"10000000", X"0000000000000063");
    WRITE32("0111", X"20000000", X"0000000040000050");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up four-dataphase 32-bit initiator  read to 32-bit target
    WRITE32("0011", X"10000000", X"0000000000000064");
    WRITE32("0111", X"20000000", X"000000004000005c");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up one-dataphase 32-bit initiator write to 32-bit target
    WRITE32("0011", X"10000000", X"0000000080000061");
    WRITE32("0111", X"20000000", X"0000000040000044");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up two-dataphase 32-bit initiator write to 32-bit target
    WRITE32("0011", X"10000000", X"0000000080000062");
    WRITE32("0111", X"20000000", X"0000000040000048");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up three-dataphase 32-bit initiator write to 32-bit target
    WRITE32("0011", X"10000000", X"0000000080000063");
    WRITE32("0111", X"20000000", X"0000000040000050");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up four-dataphase 32-bit initiator write to 32-bit target
    WRITE32("0011", X"10000000", X"0000000080000064");
    WRITE32("0111", X"20000000", X"000000004000005c");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE32;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;


    print(" ");
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    print(" ");
    print("Performing 64-bit initiator transfers from park...");
    print(" ");


    -- set up one-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000061");
    WRITE32("0111", X"20000000", X"0000000050000044");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up two-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000062");
    WRITE32("0111", X"20000000", X"0000000050000048");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up three-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000063");
    WRITE32("0111", X"20000000", X"0000000050000050");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up four-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000064");
    WRITE32("0111", X"20000000", X"000000005000005c");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up one-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000061");
    WRITE32("0111", X"20000000", X"0000000050000044");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up two-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000062");
    WRITE32("0111", X"20000000", X"0000000050000048");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up three-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000063");
    WRITE32("0111", X"20000000", X"0000000050000050");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;

    -- set up four-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000064");
    WRITE32("0111", X"20000000", X"000000005000005c");
    ARB_PARK;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    MOVE64;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    ARB_FREE;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;


    print(" ");
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    print(" ");
    print("Turning off 64-bitness...");
    print(" ");


    -- disable slot64
    WRITE_CONFIG(X"00000040", X"00000000ffffffff");
    READ_CONFIG(X"00000040");


    -- read mem32 space
    READ32("0110", X"20000000");
 
    -- read mem32 space
    READ64("0110", X"20000000");
 
 
    -- write mem32 space
    WRITE32("0111", X"20000000", X"0000000016161616");
    READ32("0110", X"20000000");
 
    -- write mem32 space
    WRITE64("0111", X"20000000", X"0000000008080808");
    READ64("0110", X"20000000");
 
 
    -- read mem64 space
    READ32("0110", X"30000000");
 
    -- read mem64 space
    READ64("0110", X"30000000");
 
 
    -- write mem64 space 
    WRITE32("0111", X"30000000", X"a5a5a5a5a5a5a5a5");
    READ32("0110", X"30000000");
 
    -- write mem64 space
    WRITE64("0111", X"30000000", X"5a5a5a5a5a5a5a5a");
    READ64("0110", X"30000000");


    -- set up two-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000062");
    WRITE32("0111", X"20000000", X"0000000050000008");
    MOVE64;

    -- set up three-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000063");
    WRITE32("0111", X"20000000", X"0000000050000010");
    MOVE64;

    -- set up four-dataphase 64-bit initiator  read to 64-bit target
    WRITE32("0011", X"10000000", X"0000000000000064");
    WRITE32("0111", X"20000000", X"000000005000001c");
    MOVE64;

    -- set up two-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000062");
    WRITE32("0111", X"20000000", X"0000000050000008");
    MOVE64;

    -- set up three-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000063");
    WRITE32("0111", X"20000000", X"0000000050000010");
    MOVE64;

    -- set up four-dataphase 64-bit initiator write to 64-bit target
    WRITE32("0011", X"10000000", X"0000000080000064");
    WRITE32("0111", X"20000000", X"000000005000001c");
    MOVE64;

 
    print(" ");
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    INTERCYCLE_GAP;
    print(" ");
    print("Simulation complete...");
    print(" ");
 
    -- disable pciclk
    pciclk_en <= '0';
 
    -- stop simulation
    assert false
    report "Simulation Complete (This is not a failure.)"
    severity failure;

end process;

end behav_arch;