glbl.v

来自「xilinx官方PCIcore 有详细说明文档」· Verilog 代码 · 共 25 行

/***********************************************************************
 
  File:   glbl.v
  Rev:    3.0.0
 
  This file contains the global module required for
  Verilog simulation.  It is identical to what is
  provided in $XILINX/verilog/src, and is provided
  here for convenience.
 
  Copyright (c) 2003 Xilinx, Inc.  All rights reserved.

***********************************************************************/
`timescale 1 ns / 1 ps


module glbl ();

    wire GR;
    wire GSR;
    wire GTS;
    wire PRLD;

endmodule