pcim_lc_66_3_s.v

xilinx官方PCIcore 有详细说明文档

/***********************************************************************

  File:   pcim_lc.v
  Rev:    3.0.0

  This is a lower-level Verilog module which serves as a wrapper
  for the PCI interface.  This module makes use of Unified Library
  Primitives.  Do not modify this file.

  Copyright (c) 2003 Xilinx, Inc.  All rights reserved.

***********************************************************************/


module pcim_lc (
                AD_IO,
                CBE_IO,
                PAR_IO,
                PAR64_IO,
                FRAME_IO,
                REQ64_IO,
                TRDY_IO,
                IRDY_IO,
                STOP_IO,
                DEVSEL_IO,
                ACK64_IO,
                IDSEL_I,
                INTA_O,
                PERR_IO,
                SERR_IO,
                REQ_O,
                GNT_I,

                RST_I,
                PCLK,

                CFG,

                FRAMEQ_N,
                REQ64Q_N,
                TRDYQ_N,
                IRDYQ_N,
                STOPQ_N,
                DEVSELQ_N,
                ACK64Q_N,

                ADDR,
                ADIO,

                CFG_VLD,
                CFG_HIT,
                C_TERM,
                C_READY,
                ADDR_VLD,
                BASE_HIT,
                S_CYCLE64,
                S_TERM,
                S_READY,
                S_ABORT,
                S_WRDN,
                S_SRC_EN,
                S_DATA_VLD,
                S_CBE,
                PCI_CMD,

                REQUEST,
                REQUEST64,
                REQUESTHOLD,
                COMPLETE,
                M_WRDN,
                M_READY,
                M_SRC_EN,
                M_DATA_VLD,
                M_CBE,
                TIME_OUT,
                M_FAIL64,
                CFG_SELF,

                M_DATA,
                DR_BUS,
                I_IDLE,
                M_ADDR_N,

                IDLE,
                B_BUSY,
                S_DATA,
                BACKOFF,

                SLOT64,
                INTR_N,
                PERRQ_N,
                SERRQ_N,
                KEEPOUT,
                CSR,
                SUB_DATA,

                RST,
                CLK
                );
                // synthesis syn_edif_bit_format = "%u<%i>"
                // synthesis syn_edif_scalar_format = "%u"
                // synthesis syn_noclockbuf = 1
                // synthesis syn_hier = "hard"


  // I/O declarations

  inout  [63:0] AD_IO;
  inout   [7:0] CBE_IO;
  inout         PAR_IO;
  inout         PAR64_IO;
  inout         FRAME_IO;
  inout         REQ64_IO;
  inout         TRDY_IO;
  inout         IRDY_IO;
  inout         STOP_IO;
  inout         DEVSEL_IO;
  inout         ACK64_IO;
  input         IDSEL_I;
  output        INTA_O;
  inout         PERR_IO;
  inout         SERR_IO;
  output        REQ_O;
  input         GNT_I;

  input         RST_I;
  input         PCLK;

  input [255:0] CFG;

  output        FRAMEQ_N;
  output        REQ64Q_N;
  output        TRDYQ_N;
  output        IRDYQ_N;
  output        STOPQ_N;
  output        DEVSELQ_N;
  output        ACK64Q_N;

  output [31:0] ADDR;
  inout  [63:0] ADIO;

  output        CFG_VLD;
  output        CFG_HIT;
  input         C_TERM;
  input         C_READY;
  output        ADDR_VLD;
  output  [7:0] BASE_HIT;
  output        S_CYCLE64;
  input         S_TERM;
  input         S_READY;
  input         S_ABORT;
  output        S_WRDN;
  output        S_SRC_EN;
  output        S_DATA_VLD;
  output  [7:0] S_CBE;
  output [15:0] PCI_CMD;

  input         REQUEST;
  input         REQUEST64;
  input         REQUESTHOLD;
  input         COMPLETE;
  input         M_WRDN;
  input         M_READY;
  output        M_SRC_EN;
  output        M_DATA_VLD;
  input   [7:0] M_CBE;
  output        TIME_OUT;
  output        M_FAIL64;
  input         CFG_SELF;

  output        M_DATA;
  output        DR_BUS;
  output        I_IDLE;
  output        M_ADDR_N;

  output        IDLE;
  output        B_BUSY;
  output        S_DATA;
  output        BACKOFF;

  input         SLOT64;
  input         INTR_N;
  output        PERRQ_N;
  output        SERRQ_N;
  input         KEEPOUT;
  output [39:0] CSR;
  input  [31:0] SUB_DATA;

  inout         RST;
  inout         CLK;


// I/O structure instantiations

IOBUF_PCI66_3 XPCI_ADB63 (.O(AD_I63),.IO(AD_IO[63]),.I(AD_O63),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB62 (.O(AD_I62),.IO(AD_IO[62]),.I(AD_O62),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB61 (.O(AD_I61),.IO(AD_IO[61]),.I(AD_O61),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB60 (.O(AD_I60),.IO(AD_IO[60]),.I(AD_O60),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB59 (.O(AD_I59),.IO(AD_IO[59]),.I(AD_O59),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB58 (.O(AD_I58),.IO(AD_IO[58]),.I(AD_O58),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB57 (.O(AD_I57),.IO(AD_IO[57]),.I(AD_O57),.T(OE_ADO_T64 ));
IOBUF_PCI66_3 XPCI_ADB56 (.O(AD_I56),.IO(AD_IO[56]),.I(AD_O56),.T(OE_ADO_T64 ));

IOBUF_PCI66_3 XPCI_ADB55 (.O(AD_I55),.IO(AD_IO[55]),.I(AD_O55),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB54 (.O(AD_I54),.IO(AD_IO[54]),.I(AD_O54),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB53 (.O(AD_I53),.IO(AD_IO[53]),.I(AD_O53),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB52 (.O(AD_I52),.IO(AD_IO[52]),.I(AD_O52),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB51 (.O(AD_I51),.IO(AD_IO[51]),.I(AD_O51),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB50 (.O(AD_I50),.IO(AD_IO[50]),.I(AD_O50),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB49 (.O(AD_I49),.IO(AD_IO[49]),.I(AD_O49),.T(OE_ADO_LT64));
IOBUF_PCI66_3 XPCI_ADB48 (.O(AD_I48),.IO(AD_IO[48]),.I(AD_O48),.T(OE_ADO_LT64));

IOBUF_PCI66_3 XPCI_ADB47 (.O(AD_I47),.IO(AD_IO[47]),.I(AD_O47),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB46 (.O(AD_I46),.IO(AD_IO[46]),.I(AD_O46),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB45 (.O(AD_I45),.IO(AD_IO[45]),.I(AD_O45),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB44 (.O(AD_I44),.IO(AD_IO[44]),.I(AD_O44),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB43 (.O(AD_I43),.IO(AD_IO[43]),.I(AD_O43),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB42 (.O(AD_I42),.IO(AD_IO[42]),.I(AD_O42),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB41 (.O(AD_I41),.IO(AD_IO[41]),.I(AD_O41),.T(OE_ADO_LB64));
IOBUF_PCI66_3 XPCI_ADB40 (.O(AD_I40),.IO(AD_IO[40]),.I(AD_O40),.T(OE_ADO_LB64));

IOBUF_PCI66_3 XPCI_ADB39 (.O(AD_I39),.IO(AD_IO[39]),.I(AD_O39),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB38 (.O(AD_I38),.IO(AD_IO[38]),.I(AD_O38),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB37 (.O(AD_I37),.IO(AD_IO[37]),.I(AD_O37),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB36 (.O(AD_I36),.IO(AD_IO[36]),.I(AD_O36),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB35 (.O(AD_I35),.IO(AD_IO[35]),.I(AD_O35),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB34 (.O(AD_I34),.IO(AD_IO[34]),.I(AD_O34),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB33 (.O(AD_I33),.IO(AD_IO[33]),.I(AD_O33),.T(OE_ADO_B64 ));
IOBUF_PCI66_3 XPCI_ADB32 (.O(AD_I32),.IO(AD_IO[32]),.I(AD_O32),.T(OE_ADO_B64 ));

IOBUF_PCI66_3 XPCI_ADB31 (.O(AD_I31),.IO(AD_IO[31]),.I(AD_O31),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB30 (.O(AD_I30),.IO(AD_IO[30]),.I(AD_O30),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB29 (.O(AD_I29),.IO(AD_IO[29]),.I(AD_O29),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB28 (.O(AD_I28),.IO(AD_IO[28]),.I(AD_O28),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB27 (.O(AD_I27),.IO(AD_IO[27]),.I(AD_O27),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB26 (.O(AD_I26),.IO(AD_IO[26]),.I(AD_O26),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB25 (.O(AD_I25),.IO(AD_IO[25]),.I(AD_O25),.T(OE_ADO_T   ));
IOBUF_PCI66_3 XPCI_ADB24 (.O(AD_I24),.IO(AD_IO[24]),.I(AD_O24),.T(OE_ADO_T   ));

IOBUF_PCI66_3 XPCI_ADB23 (.O(AD_I23),.IO(AD_IO[23]),.I(AD_O23),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB22 (.O(AD_I22),.IO(AD_IO[22]),.I(AD_O22),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB21 (.O(AD_I21),.IO(AD_IO[21]),.I(AD_O21),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB20 (.O(AD_I20),.IO(AD_IO[20]),.I(AD_O20),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB19 (.O(AD_I19),.IO(AD_IO[19]),.I(AD_O19),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB18 (.O(AD_I18),.IO(AD_IO[18]),.I(AD_O18),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB17 (.O(AD_I17),.IO(AD_IO[17]),.I(AD_O17),.T(OE_ADO_LT  ));
IOBUF_PCI66_3 XPCI_ADB16 (.O(AD_I16),.IO(AD_IO[16]),.I(AD_O16),.T(OE_ADO_LT  ));

IOBUF_PCI66_3 XPCI_ADB15 (.O(AD_I15),.IO(AD_IO[15]),.I(AD_O15),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB14 (.O(AD_I14),.IO(AD_IO[14]),.I(AD_O14),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB13 (.O(AD_I13),.IO(AD_IO[13]),.I(AD_O13),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB12 (.O(AD_I12),.IO(AD_IO[12]),.I(AD_O12),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB11 (.O(AD_I11),.IO(AD_IO[11]),.I(AD_O11),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB10 (.O(AD_I10),.IO(AD_IO[10]),.I(AD_O10),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB9  (.O(AD_I9 ),.IO(AD_IO[9 ]),.I(AD_O9 ),.T(OE_ADO_LB  ));
IOBUF_PCI66_3 XPCI_ADB8  (.O(AD_I8 ),.IO(AD_IO[8 ]),.I(AD_O8 ),.T(OE_ADO_LB  ));

IOBUF_PCI66_3 XPCI_ADB7  (.O(AD_I7 ),.IO(AD_IO[7 ]),.I(AD_O7 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB6  (.O(AD_I6 ),.IO(AD_IO[6 ]),.I(AD_O6 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB5  (.O(AD_I5 ),.IO(AD_IO[5 ]),.I(AD_O5 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB4  (.O(AD_I4 ),.IO(AD_IO[4 ]),.I(AD_O4 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB3  (.O(AD_I3 ),.IO(AD_IO[3 ]),.I(AD_O3 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB2  (.O(AD_I2 ),.IO(AD_IO[2 ]),.I(AD_O2 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB1  (.O(AD_I1 ),.IO(AD_IO[1 ]),.I(AD_O1 ),.T(OE_ADO_B   ));
IOBUF_PCI66_3 XPCI_ADB0  (.O(AD_I0 ),.IO(AD_IO[0 ]),.I(AD_O0 ),.T(OE_ADO_B   ));

FDPE XPCI_ADQ63 (.Q(AD63),.D(AD_I63),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ62 (.Q(AD62),.D(AD_I62),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ61 (.Q(AD61),.D(AD_I61),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ60 (.Q(AD60),.D(AD_I60),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ59 (.Q(AD59),.D(AD_I59),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ58 (.Q(AD58),.D(AD_I58),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ57 (.Q(AD57),.D(AD_I57),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ56 (.Q(AD56),.D(AD_I56),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ55 (.Q(AD55),.D(AD_I55),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ54 (.Q(AD54),.D(AD_I54),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ53 (.Q(AD53),.D(AD_I53),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ52 (.Q(AD52),.D(AD_I52),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ51 (.Q(AD51),.D(AD_I51),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ50 (.Q(AD50),.D(AD_I50),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ49 (.Q(AD49),.D(AD_I49),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ48 (.Q(AD48),.D(AD_I48),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ47 (.Q(AD47),.D(AD_I47),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ46 (.Q(AD46),.D(AD_I46),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ45 (.Q(AD45),.D(AD_I45),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ44 (.Q(AD44),.D(AD_I44),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ43 (.Q(AD43),.D(AD_I43),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ42 (.Q(AD42),.D(AD_I42),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ41 (.Q(AD41),.D(AD_I41),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ40 (.Q(AD40),.D(AD_I40),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ39 (.Q(AD39),.D(AD_I39),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ38 (.Q(AD38),.D(AD_I38),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ37 (.Q(AD37),.D(AD_I37),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ36 (.Q(AD36),.D(AD_I36),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ35 (.Q(AD35),.D(AD_I35),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ34 (.Q(AD34),.D(AD_I34),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ33 (.Q(AD33),.D(AD_I33),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ32 (.Q(AD32),.D(AD_I32),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ31 (.Q(AD31),.D(AD_I31),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ30 (.Q(AD30),.D(AD_I30),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ29 (.Q(AD29),.D(AD_I29),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ28 (.Q(AD28),.D(AD_I28),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ27 (.Q(AD27),.D(AD_I27),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ26 (.Q(AD26),.D(AD_I26),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ25 (.Q(AD25),.D(AD_I25),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ24 (.Q(AD24),.D(AD_I24),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ23 (.Q(AD23),.D(AD_I23),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ22 (.Q(AD22),.D(AD_I22),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ21 (.Q(AD21),.D(AD_I21),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ20 (.Q(AD20),.D(AD_I20),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ19 (.Q(AD19),.D(AD_I19),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ18 (.Q(AD18),.D(AD_I18),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ17 (.Q(AD17),.D(AD_I17),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ16 (.Q(AD16),.D(AD_I16),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ15 (.Q(AD15),.D(AD_I15),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ14 (.Q(AD14),.D(AD_I14),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ13 (.Q(AD13),.D(AD_I13),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ12 (.Q(AD12),.D(AD_I12),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ11 (.Q(AD11),.D(AD_I11),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ10 (.Q(AD10),.D(AD_I10),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ9  (.Q(AD9 ),.D(AD_I9 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ8  (.Q(AD8 ),.D(AD_I8 ),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_ADQ7  (.Q(AD7 ),.D(AD_I7 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ6  (.Q(AD6 ),.D(AD_I6 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ5  (.Q(AD5 ),.D(AD_I5 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ4  (.Q(AD4 ),.D(AD_I4 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ3  (.Q(AD3 ),.D(AD_I3 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ2  (.Q(AD2 ),.D(AD_I2 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ1  (.Q(AD1 ),.D(AD_I1 ),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_ADQ0  (.Q(AD0 ),.D(AD_I0 ),.C(CLK),.CE(1'b1),.PRE(RST));

IOBUF_PCI66_3 XPCI_CBB7 (.O(CBE_I7),.IO(CBE_IO[7]),.I(CBE_O7),.T(OE_CBE64));
IOBUF_PCI66_3 XPCI_CBB6 (.O(CBE_I6),.IO(CBE_IO[6]),.I(CBE_O6),.T(OE_CBE64));
IOBUF_PCI66_3 XPCI_CBB5 (.O(CBE_I5),.IO(CBE_IO[5]),.I(CBE_O5),.T(OE_CBE64));
IOBUF_PCI66_3 XPCI_CBB4 (.O(CBE_I4),.IO(CBE_IO[4]),.I(CBE_O4),.T(OE_CBE64));

IOBUF_PCI66_3 XPCI_CBB3 (.O(CBE_I3),.IO(CBE_IO[3]),.I(CBE_O3),.T(OE_CBE  ));
IOBUF_PCI66_3 XPCI_CBB2 (.O(CBE_I2),.IO(CBE_IO[2]),.I(CBE_O2),.T(OE_CBE  ));
IOBUF_PCI66_3 XPCI_CBB1 (.O(CBE_I1),.IO(CBE_IO[1]),.I(CBE_O1),.T(OE_CBE  ));
IOBUF_PCI66_3 XPCI_CBB0 (.O(CBE_I0),.IO(CBE_IO[0]),.I(CBE_O0),.T(OE_CBE  ));

FDPE XPCI_CBQ7 (.Q(CBE_IN7),.D(CBE_I7),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_CBQ6 (.Q(CBE_IN6),.D(CBE_I6),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_CBQ5 (.Q(CBE_IN5),.D(CBE_I5),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_CBQ4 (.Q(CBE_IN4),.D(CBE_I4),.C(CLK),.CE(1'b1),.PRE(RST));

FDPE XPCI_CBQ3 (.Q(CBE_IN3),.D(CBE_I3),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_CBQ2 (.Q(CBE_IN2),.D(CBE_I2),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_CBQ1 (.Q(CBE_IN1),.D(CBE_I1),.C(CLK),.CE(1'b1),.PRE(RST));
FDPE XPCI_CBQ0 (.Q(CBE_IN0),.D(CBE_I0),.C(CLK),.CE(1'b1),.PRE(RST));

IOBUF_PCI66_3 XPCI_PAR64    (.O(PAR64_I),.IO(PAR64_IO),
                             .I(PAR64_O),.T(OE_PAR64));

IOBUF_PCI66_3 XPCI_PAR      (.O(PAR_I),.IO(PAR_IO),
                             .I(PAR_O),.T(OE_PAR));

IOBUF_PCI66_3 XPCI_FRAME    (.O(FRAME_I),.IO(FRAME_IO),
                             .I(FRAME_O),.T(OE_FRAME));

IOBUF_PCI66_3 XPCI_REQ64    (.O(REQ64_I),.IO(REQ64_IO),
                             .I(REQ64_O),.T(OE_REQ64));

IOBUF_PCI66_3 XPCI_TRDY     (.O(TRDY_I),.IO(TRDY_IO),
                             .I(TRDY_O),.T(OE_TRDY));

IOBUF_PCI66_3 XPCI_IRDY     (.O(IRDY_I),.IO(IRDY_IO),
                             .I(IRDY_O),.T(OE_IRDY));

IOBUF_PCI66_3 XPCI_STOP     (.O(STOP_I),.IO(STOP_IO),
                             .I(STOP_O),.T(OE_STOP));