example_en_8bit_s.vq

VHDL examples for counter design, use QuickLogic eclips

`timescale 1ps / 1ps

/* Verilog Header Created from SCS Schematic example_en_8bit_s.sch 
   Aug 14, 2003 11:35 */


module example_en_8bit_s( clear_in , clk_in, enable_in, count_out );
input clear_in, clk_in;
 output [7:0] count_out;
input enable_in;
supply0 GND;
supply1 VCC;
wire qldummy_wire;
wire \IO299-OUTMUXZ_ ;
wire \IO299-OUTFF_ ;
wire \IO299-OQQ_ ;
wire \IO299-OUTFFZ_ ;
wire \IO298-OUTMUXZ_ ;
wire \IO298-OUTFF_ ;
wire \IO298-OQQ_ ;
wire \IO298-OUTFFZ_ ;
wire \IO297-OUTMUXZ_ ;
wire \IO297-OUTFF_ ;
wire \IO297-OQQ_ ;
wire \IO297-OUTFFZ_ ;
wire \IO293-OUTMUXZ_ ;
wire \IO293-OUTFF_ ;
wire \IO293-OQQ_ ;
wire \IO293-OUTFFZ_ ;
wire \IO290-OUTMUXZ_ ;
wire \IO290-OUTFF_ ;
wire \IO290-OQQ_ ;
wire \IO290-OUTFFZ_ ;
wire \IO289-OUTMUXZ_ ;
wire \IO289-OUTFF_ ;
wire \IO289-OQQ_ ;
wire \IO289-OUTFFZ_ ;
wire \IO288-OUTMUXZ_ ;
wire \IO288-OUTFF_ ;
wire \IO288-OQQ_ ;
wire \IO288-OUTFFZ_ ;
wire \IO287-OUTMUXZ_ ;
wire \IO287-OUTFF_ ;
wire \IO287-OQQ_ ;
wire \IO287-OUTFFZ_ ;
wire \IO285-INMUXZ_ ;
wire \IO285-VREFZ_ ;
wire \IO285-INPUTZ_ ;
wire \IO280-OUTMUXZ_ ;
wire \IO280-OUTFF_ ;
wire \IO280-OQQ_ ;
wire \IO280-OUTFFZ_ ;
wire \IO279-OUTMUXZ_ ;
wire \IO279-OUTFF_ ;
wire \IO279-OQQ_ ;
wire \IO279-OUTFFZ_ ;
wire \PLLIN0-OP_ ;
wire \PLLIN2-OP_ ;
wire \A7-Q2D_ ;
wire \A7-QCI_ ;
wire \A7-QD_ ;
wire \A7-O1_ ;
wire \B6-Q2D_ ;
wire \B6-QCI_ ;
wire \B6-QD_ ;
wire \B6-MC_ ;
wire \B6-O1_ ;
wire \B6-NC_ ;
wire \B6-FI_ ;
wire \B6-AI_ ;
wire \A6-Q2D_ ;
wire \A6-QCI_ ;
wire \A6-QD_ ;
wire \A6-O1_ ;
wire \B5-Q2D_ ;
wire \B5-QCI_ ;
wire \B5-QD_ ;
wire \B5-MC_ ;
wire \B5-O1_ ;
wire \B5-NC_ ;
wire \B5-FI_ ;
wire \B5-AI_ ;
wire \A5-Q2D_ ;
wire \A5-QCI_ ;
wire \A5-QD_ ;
wire \A5-MC_ ;
wire \A5-O1_ ;
wire \A5-NC_ ;
wire \A5-FI_ ;
wire \A5-AI_ ;
wire \B4-QCI_ ;
wire \B4-QD_ ;
wire \B4-OC_ ;
wire \B4-O1_ ;
wire \B4-NC_ ;
wire \B4-FI_ ;
wire \B4-AI_ ;
wire \A4-Q2D_ ;
wire \A4-QCI_ ;
wire \A4-QD_ ;
wire \A4-MC_ ;
wire \A4-O1_ ;
wire \A4-NC_ ;
wire \A4-FI_ ;
wire \A4-AI_ ;
wire \B3-QCI_ ;
wire \B3-QD_ ;
wire \B3-OC_ ;
wire \B3-MC_ ;
wire \B3-FI_ ;
wire \B3-AI_ ;
wire \A3-Q2D_ ;
wire \A3-QCI_ ;
wire \A3-QD_ ;
wire \A3-O1_ ;
wire \A3-AI_ ;
wire \B2-Q2D_ ;
wire \B2-QCI_ ;
wire \B1-Q2D_ ;
wire \B1-QCI_ ;
wire \B1-QD_ ;
wire \B1-O1_ ;
wire \I9-enable_1_a_LRBUF0 ;
wire \I9(I21(I2-NZ ;
wire \I9(I21(I2-OZ ;
wire \I9(I21(I1-FZ ;
wire \I9(I21(I1-NZ ;
wire \I9(I21(I1-OZ ;
wire \I9(I21-BCD_a ;
wire \I9(I21-ABCDE_a ;
wire \I9(I21-ED_a ;
wire \I9(I20(I2-NZ ;
wire \I9(I20(I2-OZ ;
wire \I9(I20(I1-FZ ;
wire \I9(I20(I1-NZ ;
wire \I9(I20(I1-OZ ;
wire \I9(I20-BCD_a ;
wire \I9(I20-ABCDE_a ;
wire \I9(I20-ED_a ;
wire \I9(I19-Q2Z ;
wire \I9(I19-NZ ;
wire \I9(I19-OZ ;
wire \I9(I19-AZ ;
wire \I9(I14-Q2Z ;
wire \I9(I14-NZ ;
wire \I9(I14-OZ ;
wire \I9(I14-AZ ;
wire \I9-enable_1_a ;
wire \I9-fo_enable_r ;
wire \I9-enable_buf_a ;
wire \I9-enable_2_r ;
wire \I2(I2-FZ ;
wire \I2(I2-NZ ;
wire \I2(I2-OZ ;
wire \I2(I2-AZ ;
wire \I2-Q2 ;
wire \I1(I6(I2-FZ ;
wire \I1(I6(I2-NZ ;
wire \I1(I6(I2-OZ ;
wire \I1(I6(I2-AZ ;
wire \I1(I5(I2-FZ ;
wire \I1(I5(I2-NZ ;
wire \I1(I5(I2-OZ ;
wire \I1(I5(I2-AZ ;
wire \I1(I4(I2-FZ ;
wire \I1(I4(I2-NZ ;
wire \I1(I4(I2-OZ ;
wire \I1(I4(I2-AZ ;
wire \I1(I3(I2-FZ ;
wire \I1(I3(I2-NZ ;
wire \I1(I3(I2-OZ ;
wire \I1(I3(I2-AZ ;
wire \count_reg[0] ;
wire \count_reg[1] ;
wire \count_reg[2] ;
wire \count_reg[3] ;
wire \count_reg[4] ;
wire \count_reg[5] ;
wire \count_reg[6] ;
wire \count_reg[7] ;
wire \count[0] ;
wire \count[1] ;
wire \count[2] ;
wire \count[3] ;
wire \count[4] ;
wire \count[5] ;
wire \count[6] ;
wire \count[7] ;
wire enable_reg;
wire enable;
wire clear;
wire clk;

initial
begin
	$display("\nOPERATING RANGE: Commercial");
	$display("\nSPEED GRADE: 8\n");
end

P_SLEWWPD \I3(I7_IO299-FRAG_BSLEW_WPD  (\IO299-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[6]);
P_MUX2 \I3(I7_IO299-FRAG_BOUT_MUX  (\IO299-OUTFFZ_ ,GND,\count_reg[6] ,GND,VCC,
   \IO299-OUTMUXZ_ );
P_BUF \I3(I7_IO299-FRAG_BOUT_BUF149  (\IO299-OUTFFZ_ ,\IO299-OUTFF_ );
P_BUF \I3(I7_IO299-FRAG_BOUT_BUF  (\IO299-OUTFFZ_ ,\IO299-OQQ_ );
P_FF \I3(I7_IO299-FRAG_BQ_OUT  (\count_reg[6] ,GND,GND,GND,\IO299-OUTFFZ_ );
P_SLEWWPD \I3(I8_IO298-FRAG_BSLEW_WPD  (\IO298-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[7]);
P_MUX2 \I3(I8_IO298-FRAG_BOUT_MUX  (\IO298-OUTFFZ_ ,GND,\count_reg[7] ,GND,VCC,
   \IO298-OUTMUXZ_ );
P_BUF \I3(I8_IO298-FRAG_BOUT_BUF148  (\IO298-OUTFFZ_ ,\IO298-OUTFF_ );
P_BUF \I3(I8_IO298-FRAG_BOUT_BUF  (\IO298-OUTFFZ_ ,\IO298-OQQ_ );
P_FF \I3(I8_IO298-FRAG_BQ_OUT  (\count_reg[7] ,GND,GND,GND,\IO298-OUTFFZ_ );
P_SLEWWPD \I3(I4_IO297-FRAG_BSLEW_WPD  (\IO297-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[3]);
P_MUX2 \I3(I4_IO297-FRAG_BOUT_MUX  (\IO297-OUTFFZ_ ,GND,\count_reg[3] ,GND,VCC,
   \IO297-OUTMUXZ_ );
P_BUF \I3(I4_IO297-FRAG_BOUT_BUF147  (\IO297-OUTFFZ_ ,\IO297-OUTFF_ );
P_BUF \I3(I4_IO297-FRAG_BOUT_BUF  (\IO297-OUTFFZ_ ,\IO297-OQQ_ );
P_FF \I3(I4_IO297-FRAG_BQ_OUT  (\count_reg[3] ,GND,GND,GND,\IO297-OUTFFZ_ );
P_SLEWWPD \I3(I3_IO293-FRAG_BSLEW_WPD  (\IO293-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[2]);
P_MUX2 \I3(I3_IO293-FRAG_BOUT_MUX  (\IO293-OUTFFZ_ ,GND,\count_reg[2] ,GND,VCC,
   \IO293-OUTMUXZ_ );
P_BUF \I3(I3_IO293-FRAG_BOUT_BUF146  (\IO293-OUTFFZ_ ,\IO293-OUTFF_ );
P_BUF \I3(I3_IO293-FRAG_BOUT_BUF  (\IO293-OUTFFZ_ ,\IO293-OQQ_ );
P_FF \I3(I3_IO293-FRAG_BQ_OUT  (\count_reg[2] ,GND,GND,GND,\IO293-OUTFFZ_ );
P_SLEWWPD \I3(I5_IO290-FRAG_BSLEW_WPD  (\IO290-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[4]);
P_MUX2 \I3(I5_IO290-FRAG_BOUT_MUX  (\IO290-OUTFFZ_ ,GND,\count_reg[4] ,GND,VCC,
   \IO290-OUTMUXZ_ );
P_BUF \I3(I5_IO290-FRAG_BOUT_BUF145  (\IO290-OUTFFZ_ ,\IO290-OUTFF_ );
P_BUF \I3(I5_IO290-FRAG_BOUT_BUF  (\IO290-OUTFFZ_ ,\IO290-OQQ_ );
P_FF \I3(I5_IO290-FRAG_BQ_OUT  (\count_reg[4] ,GND,GND,GND,\IO290-OUTFFZ_ );
P_SLEWWPD \I9(I18_IO289-FRAG_BSLEW_WPD  (\IO289-OUTMUXZ_ ,VCC,VCC,VCC,
   \I9-f_enable_1 );
P_MUX2 \I9(I18_IO289-FRAG_BOUT_MUX  (\IO289-OUTFFZ_ ,GND,\I9-enable_1_a ,GND,
   VCC,\IO289-OUTMUXZ_ );
P_BUF \I9(I18_IO289-FRAG_BOUT_BUF144  (\IO289-OUTFFZ_ ,\IO289-OUTFF_ );
P_BUF \I9(I18_IO289-FRAG_BOUT_BUF  (\IO289-OUTFFZ_ ,\IO289-OQQ_ );
P_FF \I9(I18_IO289-FRAG_BQ_OUT  (\I9-enable_1_a ,GND,GND,GND,\IO289-OUTFFZ_ );
P_SLEWWPD \I3(I6_IO288-FRAG_BSLEW_WPD  (\IO288-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[5]);
P_MUX2 \I3(I6_IO288-FRAG_BOUT_MUX  (\IO288-OUTFFZ_ ,GND,\count_reg[5] ,GND,VCC,
   \IO288-OUTMUXZ_ );
P_BUF \I3(I6_IO288-FRAG_BOUT_BUF143  (\IO288-OUTFFZ_ ,\IO288-OUTFF_ );
P_BUF \I3(I6_IO288-FRAG_BOUT_BUF  (\IO288-OUTFFZ_ ,\IO288-OQQ_ );
P_FF \I3(I6_IO288-FRAG_BQ_OUT  (\count_reg[5] ,GND,GND,GND,\IO288-OUTFFZ_ );
P_SLEWWPD \I9(I17_IO287-FRAG_BSLEW_WPD  (\IO287-OUTMUXZ_ ,VCC,VCC,VCC,
   \I9-f_enable_2 );
P_MUX2 \I9(I17_IO287-FRAG_BOUT_MUX  (\IO287-OUTFFZ_ ,GND,\I9-enable_2_r ,GND,
   VCC,\IO287-OUTMUXZ_ );
P_BUF \I9(I17_IO287-FRAG_BOUT_BUF142  (\IO287-OUTFFZ_ ,\IO287-OUTFF_ );
P_BUF \I9(I17_IO287-FRAG_BOUT_BUF  (\IO287-OUTFFZ_ ,\IO287-OQQ_ );
P_FF \I9(I17_IO287-FRAG_BQ_OUT  (\I9-enable_2_r ,GND,GND,GND,\IO287-OUTFFZ_ );
P_BUF \I4_IO285-FRAG_BIZ_BUF  (\IO285-INMUXZ_ ,enable);
P_MUX2 \IO285-FRAG_BIN_MUX  (\IO285-VREFZ_ ,GND,\IO285-INPUTZ_ ,GND,VCC,
   \IO285-INMUXZ_ );
P_BUF \IO285-FRAG_BVREF  (\IO285-INPUTZ_ ,\IO285-VREFZ_ );
P_BUF \I4_IO285-FRAG_BIDIR_PAD  (enable_in,\IO285-INPUTZ_ );
P_SLEWWPD \I3(I1_IO280-FRAG_BSLEW_WPD  (\IO280-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[0]);
P_MUX2 \I3(I1_IO280-FRAG_BOUT_MUX  (\IO280-OUTFFZ_ ,GND,\count_reg[0] ,GND,VCC,
   \IO280-OUTMUXZ_ );
P_BUF \I3(I1_IO280-FRAG_BOUT_BUF141  (\IO280-OUTFFZ_ ,\IO280-OUTFF_ );
P_BUF \I3(I1_IO280-FRAG_BOUT_BUF  (\IO280-OUTFFZ_ ,\IO280-OQQ_ );
P_FF \I3(I1_IO280-FRAG_BQ_OUT  (\count_reg[0] ,GND,GND,GND,\IO280-OUTFFZ_ );
P_SLEWWPD \I3(I2_IO279-FRAG_BSLEW_WPD  (\IO279-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[1]);
P_MUX2 \I3(I2_IO279-FRAG_BOUT_MUX  (\IO279-OUTFFZ_ ,GND,\count_reg[1] ,GND,VCC,
   \IO279-OUTMUXZ_ );
P_BUF \I3(I2_IO279-FRAG_BOUT_BUF140  (\IO279-OUTFFZ_ ,\IO279-OUTFF_ );
P_BUF \I3(I2_IO279-FRAG_BOUT_BUF  (\IO279-OUTFFZ_ ,\IO279-OQQ_ );
P_FF \I3(I2_IO279-FRAG_BQ_OUT  (\count_reg[1] ,GND,GND,GND,\IO279-OUTFFZ_ );
P_BUF \I5_PLLIN0-FRAG_CLOCK_PLL_BUFF  (clk_in,\PLLIN0-OP_ );
P_BUF \I5_PLLIN0-FRAG_CLOCK_BUFF  (clk_in,clk);
P_BUF \I6_PLLIN2-FRAG_CLOCK_PLL_BUFF  (clear_in,\PLLIN2-OP_ );
P_BUF \I6_PLLIN2-FRAG_CLOCK_BUFF  (clear_in,clear);
P_FF \I1(I3(I2_A7-FRAG_LQ2  (\A7-Q2D_ ,\A7-QCI_ ,GND,GND,\count_reg[7] );
P_MUX2 \I1(I3(I2_A7-FRAG_LPS  (\A7-O1_ ,GND,\count[7] ,GND,VCC,\A7-Q2D_ );
P_FF \I1(I3(I2_A7-FRAG_LQ  (\A7-QD_ ,\A7-QCI_ ,GND,GND,\count_reg[6] );
P_BUF \I1(I3(I2_A7-FRAG_LQC  (clk,\A7-QCI_ );
P_MUX3 \A7-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\A7-O1_ ,\A7-QD_ );
P_MUX2 \I1(I3(I2_A7-FRAG_LN  (VCC,GND,\count[6] ,GND,VCC,\A7-O1_ );
P_FF \I9(I21(I2_B6-FRAG_LQ2  (\B6-Q2D_ ,\B6-QCI_ ,GND,clear,\count[0] );
P_MUX2 \I9(I21(I2_B6-FRAG_LPS  (\B6-O1_ ,GND,GND,GND,GND,\B6-Q2D_ );
P_FF \I9(I21(I2_B6-FRAG_LQ  (\B6-QD_ ,\B6-QCI_ ,GND,clear,\count[3] );
P_BUF \I9(I21(I2_B6-FRAG_LQC  (clk,\B6-QCI_ );
P_MUX3 \I9(I21(I2_B6-FRAG_LO  (\count[3] ,GND,VCC,\count[3] ,\B6-MC_ ,GND,
   \B6-O1_ ,\B6-QD_ );
P_MUX2 \I9(I21(I2_B6-FRAG_LMS  (GND,GND,\B6-FI_ ,GND,\I9-enable_buf_a ,
   \B6-MC_ );
P_MUX2 \I9(I21(I2_B6-FRAG_LN  (\I9-enable_buf_a ,\count[0] ,\count[0] ,
   \I9-enable_buf_a ,\B6-NC_ ,\B6-O1_ );
P_MUX2 \I9(I21(I2_B6-FRAG_LNS  (\count[0] ,GND,\B6-FI_ ,GND,GND,\B6-NC_ );
P_BUF \I9(I21(I2_B6-FRAG_FB  (\B6-FI_ ,\I9(I21-BCD_a );
P_AND6 \I9(I21(I2_B6-FRAG_LF  (\count[2] ,GND,\count[1] ,GND,\count[0] ,GND,
   \B6-FI_ );
P_BUF \I9(I21(I2_B6-FRAG_AB  (\B6-AI_ ,\I9(I21-ED_a );
P_AND6 \I9(I21(I2_B6-FRAG_LA  (\I9-enable_buf_a ,GND,\count[0] ,GND,VCC,GND,
   \B6-AI_ );
P_FF \I1(I6(I2_A6-FRAG_LQ2  (\A6-Q2D_ ,\A6-QCI_ ,GND,GND,\count_reg[3] );
P_MUX2 \I1(I6(I2_A6-FRAG_LPS  (\A6-O1_ ,GND,\count[3] ,GND,VCC,\A6-Q2D_ );
P_FF \I1(I6(I2_A6-FRAG_LQ  (\A6-QD_ ,\A6-QCI_ ,GND,GND,\count_reg[2] );
P_BUF \I1(I6(I2_A6-FRAG_LQC  (clk,\A6-QCI_ );
P_MUX3 \A6-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\A6-O1_ ,\A6-QD_ );
P_MUX2 \I1(I6(I2_A6-FRAG_LN  (VCC,GND,\count[2] ,GND,VCC,\A6-O1_ );
P_FF \I9(I21(I1_B5-FRAG_LQ2  (\B5-Q2D_ ,\B5-QCI_ ,GND,clear,\count[2] );
P_MUX2 \I9(I21(I1_B5-FRAG_LPS  (\B5-O1_ ,GND,GND,GND,GND,\B5-Q2D_ );
P_FF \I9(I21(I1_B5-FRAG_LQ  (\B5-QD_ ,\B5-QCI_ ,GND,clear,\count[1] );
P_BUF \I9(I21(I1_B5-FRAG_LQC  (clk,\B5-QCI_ );
P_MUX3 \I9(I21(I1_B5-FRAG_LO  (\I9(I21-ED_a ,\count[1] ,\count[1] ,
   \I9(I21-ED_a ,\B5-MC_ ,GND,\B5-O1_ ,\B5-QD_ );
P_MUX2 \I9(I21(I1_B5-FRAG_LMS  (\count[1] ,GND,\B5-FI_ ,GND,GND,\B5-MC_ );
P_MUX2 \I9(I21(I1_B5-FRAG_LN  (\count[2] ,GND,VCC,\count[2] ,\B5-NC_ ,\B5-O1_ );
P_MUX2 \I9(I21(I1_B5-FRAG_LNS  (GND,GND,\B5-FI_ ,GND,\I9-enable_buf_a ,
   \B5-NC_ );
P_AND6 \I9(I21(I1_B5-FRAG_LF  (\count[1] ,GND,\count[0] ,GND,VCC,GND,\B5-FI_ );
P_AND6 \I9(I21(I1_B5-FRAG_LA  (\I9(I21-BCD_a ,GND,\I9(I21-ED_a ,GND,\count[3] ,
   GND,\B5-AI_ );
P_FF \I9(I20(I2_A5-FRAG_LQ2  (\A5-Q2D_ ,\A5-QCI_ ,GND,clear,\count[4] );
P_MUX2 \I9(I20(I2_A5-FRAG_LPS  (\A5-O1_ ,GND,GND,GND,GND,\A5-Q2D_ );
P_FF \I9(I20(I2_A5-FRAG_LQ  (\A5-QD_ ,\A5-QCI_ ,GND,clear,\count[7] );
P_BUF \I9(I20(I2_A5-FRAG_LQC  (clk,\A5-QCI_ );
P_MUX3 \I9(I20(I2_A5-FRAG_LO  (\count[7] ,GND,VCC,\count[7] ,\A5-MC_ ,GND,
   \A5-O1_ ,\A5-QD_ );
P_MUX2 \I9(I20(I2_A5-FRAG_LMS  (GND,GND,\A5-FI_ ,GND,\I9-enable_1_a_LRBUF0 ,
   \A5-MC_ );
P_MUX2 \I9(I20(I2_A5-FRAG_LN  (\I9-enable_1_a_LRBUF0 ,\count[4] ,\count[4] ,
   \I9-enable_1_a_LRBUF0 ,\A5-NC_ ,\A5-O1_ );
P_MUX2 \I9(I20(I2_A5-FRAG_LNS  (\count[4] ,GND,\A5-FI_ ,GND,GND,\A5-NC_ );
P_BUF \I9(I20(I2_A5-FRAG_FB  (\A5-FI_ ,\I9(I20-BCD_a );
P_AND6 \I9(I20(I2_A5-FRAG_LF  (\count[6] ,GND,\count[5] ,GND,\count[4] ,GND,
   \A5-FI_ );
P_BUF \I9(I20(I2_A5-FRAG_AB  (\A5-AI_ ,\I9(I20-ED_a );
P_AND6 \I9(I20(I2_A5-FRAG_LA  (\I9-enable_1_a_LRBUF0 ,GND,\count[4] ,GND,VCC,
   GND,\A5-AI_ );
P_FF \I9(I14_B4-FRAG_LQ  (\B4-QD_ ,\B4-QCI_ ,GND,clear,\I9-fo_enable_r );
P_BUF \I9(I14_B4-FRAG_LQC  (clk,\B4-QCI_ );
P_MUX3 \I9(I14_B4-FRAG_LO  (GND,GND,GND,GND,GND,\B4-OC_ ,\B4-O1_ ,\B4-QD_ );
P_MUX2 \I9(I14_B4-FRAG_LOS  (GND,GND,\B4-AI_ ,GND,VCC,\B4-OC_ );
P_MUX2 \I9(I14_B4-FRAG_LN  (\count[0] ,GND,VCC,\count[0] ,\B4-NC_ ,\B4-O1_ );
P_MUX2 \I9(I14_B4-FRAG_LNS  (enable_reg,GND,\B4-FI_ ,GND,GND,\B4-NC_ );
P_BUF \I9(I14_B4-FRAG_FB  (\B4-FI_ ,\I9-enable_1_a );
P_AND6 \I9(I14_B4-FRAG_LF  (\I9-fo_enable_r ,GND,enable_reg,GND,VCC,GND,
   \B4-FI_ );
P_AND6 \I9(I14_B4-FRAG_LA  (\count[3] ,GND,\count[2] ,GND,\count[1] ,GND,
   \B4-AI_ );
P_FF \I9(I20(I1_A4-FRAG_LQ2  (\A4-Q2D_ ,\A4-QCI_ ,GND,clear,\count[6] );
P_MUX2 \I9(I20(I1_A4-FRAG_LPS  (\A4-O1_ ,GND,GND,GND,GND,\A4-Q2D_ );
P_FF \I9(I20(I1_A4-FRAG_LQ  (\A4-QD_ ,\A4-QCI_ ,GND,clear,\count[5] );
P_BUF \I9(I20(I1_A4-FRAG_LQC  (clk,\A4-QCI_ );
P_MUX3 \I9(I20(I1_A4-FRAG_LO  (\I9(I20-ED_a ,\count[5] ,\count[5] ,
   \I9(I20-ED_a ,\A4-MC_ ,GND,\A4-O1_ ,\A4-QD_ );
P_MUX2 \I9(I20(I1_A4-FRAG_LMS  (\count[5] ,GND,\A4-FI_ ,GND,GND,\A4-MC_ );
P_MUX2 \I9(I20(I1_A4-FRAG_LN  (\count[6] ,GND,VCC,\count[6] ,\A4-NC_ ,\A4-O1_ );
P_MUX2 \I9(I20(I1_A4-FRAG_LNS  (GND,GND,\A4-FI_ ,GND,\I9-enable_1_a_LRBUF0 ,
   \A4-NC_ );
P_AND6 \I9(I20(I1_A4-FRAG_LF  (\count[5] ,GND,\count[4] ,GND,VCC,GND,\A4-FI_ );
P_AND6 \I9(I20(I1_A4-FRAG_LA  (\I9(I20-BCD_a ,GND,\I9(I20-ED_a ,GND,\count[7] ,
   GND,\A4-AI_ );
P_FF \I9(I19_B3-FRAG_LQ  (\B3-QD_ ,\B3-QCI_ ,GND,clear,\I9-enable_2_r );
P_BUF \I9(I19_B3-FRAG_LQC  (clk,\B3-QCI_ );
P_MUX3 \I9(I19_B3-FRAG_LO  (VCC,GND,GND,GND,\B3-MC_ ,\B3-OC_ ,GND,\B3-QD_ );
P_MUX2 \I9(I19_B3-FRAG_LOS  (GND,GND,\B3-AI_ ,GND,VCC,\B3-OC_ );
P_MUX2 \I9(I19_B3-FRAG_LMS  (\count[4] ,GND,\B3-FI_ ,GND,GND,\B3-MC_ );
P_BUF \I9(I19_B3-FRAG_FB  (\B3-FI_ ,\I9-enable_buf_a );
P_AND6 \I9(I19_B3-FRAG_LF  (enable_reg,GND,VCC,GND,VCC,GND,\B3-FI_ );
P_AND6 \I9(I19_B3-FRAG_LA  (\count[7] ,GND,\count[6] ,GND,\count[5] ,GND,
   \B3-AI_ );
P_FF \I1(I4(I2_A3-FRAG_LQ2  (\A3-Q2D_ ,\A3-QCI_ ,GND,GND,\count_reg[5] );
P_MUX2 \I1(I4(I2_A3-FRAG_LPS  (\A3-O1_ ,GND,\count[5] ,GND,VCC,\A3-Q2D_ );
P_FF \I1(I4(I2_A3-FRAG_LQ  (\A3-QD_ ,\A3-QCI_ ,GND,GND,\count_reg[4] );
P_BUF \I1(I4(I2_A3-FRAG_LQC  (clk,\A3-QCI_ );
P_MUX3 \A3-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\A3-O1_ ,\A3-QD_ );
P_MUX2 \I1(I4(I2_A3-FRAG_LN  (VCC,GND,\count[4] ,GND,VCC,\A3-O1_ );
P_BUF \A3-FRAG_AB  (\A3-AI_ ,\I9-enable_1_a_LRBUF0 );
P_AND6 \A3-FRAG_LA  (\I9-enable_1_a ,GND,VCC,GND,VCC,GND,\A3-AI_ );
P_FF \I2(I2_B2-FRAG_LQ2  (\B2-Q2D_ ,\B2-QCI_ ,GND,GND,enable_reg);
P_MUX2 \B2-FRAG_LPS  (VCC,GND,enable,GND,VCC,\B2-Q2D_ );
P_BUF \I2(I2_B2-FRAG_LQC  (clk,\B2-QCI_ );
P_FF \I1(I5(I2_B1-FRAG_LQ2  (\B1-Q2D_ ,\B1-QCI_ ,GND,GND,\count_reg[1] );
P_MUX2 \I1(I5(I2_B1-FRAG_LPS  (\B1-O1_ ,GND,\count[1] ,GND,VCC,\B1-Q2D_ );
P_FF \I1(I5(I2_B1-FRAG_LQ  (\B1-QD_ ,\B1-QCI_ ,GND,GND,\count_reg[0] );
P_BUF \I1(I5(I2_B1-FRAG_LQC  (clk,\B1-QCI_ );
P_MUX3 \B1-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\B1-O1_ ,\B1-QD_ );
P_MUX2 \I1(I5(I2_B1-FRAG_LN  (VCC,GND,\count[0] ,GND,VCC,\B1-O1_ );
endmodule