example_en_4bit.vq

VHDL examples for counter design, use QuickLogic eclips

`timescale 1ps / 1ps

/* Verilog Header Created from SCS Schematic example_en_4bit.sch 
   Aug 13, 2003 12:30 */


module example_en_4bit( clear_in , clk_in, enable_in, count_out );
input clear_in, clk_in;
 output [3:0] count_out;
input enable_in;
supply0 GND;
supply1 VCC;
wire qldummy_wire;
wire \IO84-OUTMUXZ_ ;
wire \IO84-OUTFF_ ;
wire \IO84-OQQ_ ;
wire \IO84-OUTFFZ_ ;
wire \IO82-OUTMUXZ_ ;
wire \IO82-OUTFF_ ;
wire \IO82-OQQ_ ;
wire \IO82-OUTFFZ_ ;
wire \IO79-OUTMUXZ_ ;
wire \IO79-OUTFF_ ;
wire \IO79-OQQ_ ;
wire \IO79-OUTFFZ_ ;
wire \IO77-INMUXZ_ ;
wire \IO77-VREFZ_ ;
wire \IO77-INPUTZ_ ;
wire \IO70-OUTMUXZ_ ;
wire \IO70-OUTFF_ ;
wire \IO70-OQQ_ ;
wire \IO70-OUTFFZ_ ;
wire \PLLIN0-OP_ ;
wire \PLLIN2-OP_ ;
wire \AM32-Q2D_ ;
wire \AM32-QCI_ ;
wire \AL32-Q2D_ ;
wire \AL32-QCI_ ;
wire \AK32-Q2D_ ;
wire \AK32-QCI_ ;
wire \AJ32-Q2D_ ;
wire \AJ32-QCI_ ;
wire \AI32-Q2D_ ;
wire \AI32-QCI_ ;
wire \AI32-QD_ ;
wire \AI32-MC_ ;
wire \AI32-O1_ ;
wire \AI32-NC_ ;
wire \AI32-FI_ ;
wire \AI32-AI_ ;
wire \AH32-Q2D_ ;
wire \AH32-QCI_ ;
wire \AI31-Q2D_ ;
wire \AI31-QCI_ ;
wire \AI31-QD_ ;
wire \AI31-MC_ ;
wire \AI31-O1_ ;
wire \AI31-NC_ ;
wire \AI31-FI_ ;
wire \AG27-OC_ ;
wire \AG27-AI_ ;
wire \count[0]_LRBUF0 ;
wire \I11(I2-NZ ;
wire \I11(I2-OZ ;
wire \I11(I2-AZ ;
wire \I11(I1-NZ ;
wire \I11(I1-OZ ;
wire \I11-ED_a ;
wire \I11-enablehbit_a ;
wire \I11-BCD_a ;
wire \I10(I2-FZ ;
wire \I10(I2-NZ ;
wire \I10(I2-OZ ;
wire \I10(I2-AZ ;
wire \I10-Q2 ;
wire enable_reg;
wire \count_reg[0] ;
wire \count_reg[1] ;
wire \count_reg[2] ;
wire \count_reg[3] ;
wire \count[0] ;
wire \count[1] ;
wire \count[2] ;
wire \count[3] ;
wire enable;
wire clear;
wire clk;

initial
begin
	$display("\nOPERATING RANGE: Commercial");
	$display("\nSPEED GRADE: 8\n");
end

P_SLEWWPD \I5(I1_IO84-FRAG_BSLEW_WPD  (\IO84-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[0]);
P_MUX2 \I5(I1_IO84-FRAG_BOUT_MUX  (\IO84-OUTFFZ_ ,GND,\count_reg[0] ,GND,VCC,
   \IO84-OUTMUXZ_ );
P_BUF \I5(I1_IO84-FRAG_BOUT_BUF19  (\IO84-OUTFFZ_ ,\IO84-OUTFF_ );
P_BUF \I5(I1_IO84-FRAG_BOUT_BUF  (\IO84-OUTFFZ_ ,\IO84-OQQ_ );
P_FF \I5(I1_IO84-FRAG_BQ_OUT  (\count_reg[0] ,GND,GND,GND,\IO84-OUTFFZ_ );
P_SLEWWPD \I5(I2_IO82-FRAG_BSLEW_WPD  (\IO82-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[1]);
P_MUX2 \I5(I2_IO82-FRAG_BOUT_MUX  (\IO82-OUTFFZ_ ,GND,\count_reg[1] ,GND,VCC,
   \IO82-OUTMUXZ_ );
P_BUF \I5(I2_IO82-FRAG_BOUT_BUF18  (\IO82-OUTFFZ_ ,\IO82-OUTFF_ );
P_BUF \I5(I2_IO82-FRAG_BOUT_BUF  (\IO82-OUTFFZ_ ,\IO82-OQQ_ );
P_FF \I5(I2_IO82-FRAG_BQ_OUT  (\count_reg[1] ,GND,GND,GND,\IO82-OUTFFZ_ );
P_SLEWWPD \I5(I3_IO79-FRAG_BSLEW_WPD  (\IO79-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[2]);
P_MUX2 \I5(I3_IO79-FRAG_BOUT_MUX  (\IO79-OUTFFZ_ ,GND,\count_reg[2] ,GND,VCC,
   \IO79-OUTMUXZ_ );
P_BUF \I5(I3_IO79-FRAG_BOUT_BUF17  (\IO79-OUTFFZ_ ,\IO79-OUTFF_ );
P_BUF \I5(I3_IO79-FRAG_BOUT_BUF  (\IO79-OUTFFZ_ ,\IO79-OQQ_ );
P_FF \I5(I3_IO79-FRAG_BQ_OUT  (\count_reg[2] ,GND,GND,GND,\IO79-OUTFFZ_ );
P_BUF \I6_IO77-FRAG_BIZ_BUF  (\IO77-INMUXZ_ ,enable);
P_MUX2 \IO77-FRAG_BIN_MUX  (\IO77-VREFZ_ ,GND,\IO77-INPUTZ_ ,GND,VCC,
   \IO77-INMUXZ_ );
P_BUF \IO77-FRAG_BVREF  (\IO77-INPUTZ_ ,\IO77-VREFZ_ );
P_BUF \I6_IO77-FRAG_BIDIR_PAD  (enable_in,\IO77-INPUTZ_ );
P_SLEWWPD \I5(I4_IO70-FRAG_BSLEW_WPD  (\IO70-OUTMUXZ_ ,VCC,VCC,VCC,
   count_out[3]);
P_MUX2 \I5(I4_IO70-FRAG_BOUT_MUX  (\IO70-OUTFFZ_ ,GND,\count_reg[3] ,GND,VCC,
   \IO70-OUTMUXZ_ );
P_BUF \I5(I4_IO70-FRAG_BOUT_BUF16  (\IO70-OUTFFZ_ ,\IO70-OUTFF_ );
P_BUF \I5(I4_IO70-FRAG_BOUT_BUF  (\IO70-OUTFFZ_ ,\IO70-OQQ_ );
P_FF \I5(I4_IO70-FRAG_BQ_OUT  (\count_reg[3] ,GND,GND,GND,\IO70-OUTFFZ_ );
P_BUF \I7_PLLIN0-FRAG_CLOCK_PLL_BUFF  (clk_in,\PLLIN0-OP_ );
P_BUF \I7_PLLIN0-FRAG_CLOCK_BUFF  (clk_in,clk);
P_BUF \I8_PLLIN2-FRAG_CLOCK_PLL_BUFF  (clear_in,\PLLIN2-OP_ );
P_BUF \I8_PLLIN2-FRAG_CLOCK_BUFF  (clear_in,clear);
P_FF \I9(QL4_AM32-FRAG_LQ2  (\AM32-Q2D_ ,\AM32-QCI_ ,GND,GND,\count_reg[0] );
P_MUX2 \AM32-FRAG_LPS  (VCC,GND,\count[0]_LRBUF0 ,GND,VCC,\AM32-Q2D_ );
P_BUF \I9(QL4_AM32-FRAG_LQC  (clk,\AM32-QCI_ );
P_FF \I9(QL3_AL32-FRAG_LQ2  (\AL32-Q2D_ ,\AL32-QCI_ ,GND,GND,\count_reg[1] );
P_MUX2 \AL32-FRAG_LPS  (VCC,GND,\count[1] ,GND,VCC,\AL32-Q2D_ );
P_BUF \I9(QL3_AL32-FRAG_LQC  (clk,\AL32-QCI_ );
P_FF \I9(QL2_AK32-FRAG_LQ2  (\AK32-Q2D_ ,\AK32-QCI_ ,GND,GND,\count_reg[2] );
P_MUX2 \AK32-FRAG_LPS  (VCC,GND,\count[2] ,GND,VCC,\AK32-Q2D_ );
P_BUF \I9(QL2_AK32-FRAG_LQC  (clk,\AK32-QCI_ );
P_FF \I10(I2_AJ32-FRAG_LQ2  (\AJ32-Q2D_ ,\AJ32-QCI_ ,GND,GND,enable_reg);
P_MUX2 \AJ32-FRAG_LPS  (VCC,GND,enable,GND,VCC,\AJ32-Q2D_ );
P_BUF \I10(I2_AJ32-FRAG_LQC  (clk,\AJ32-QCI_ );
P_FF \I11(I1_AI32-FRAG_LQ2  (\AI32-Q2D_ ,\AI32-QCI_ ,GND,clear,\count[2] );
P_MUX2 \I11(I1_AI32-FRAG_LPS  (\AI32-O1_ ,GND,GND,GND,GND,\AI32-Q2D_ );
P_FF \I11(I1_AI32-FRAG_LQ  (\AI32-QD_ ,\AI32-QCI_ ,GND,clear,\count[1] );
P_BUF \I11(I1_AI32-FRAG_LQC  (clk,\AI32-QCI_ );
P_MUX3 \I11(I1_AI32-FRAG_LO  (\I11-ED_a ,\count[1] ,\count[1] ,\I11-ED_a ,
   \AI32-MC_ ,GND,\AI32-O1_ ,\AI32-QD_ );
P_MUX2 \I11(I1_AI32-FRAG_LMS  (\count[1] ,GND,\AI32-FI_ ,GND,GND,\AI32-MC_ );
P_MUX2 \I11(I1_AI32-FRAG_LN  (\count[2] ,GND,VCC,\count[2] ,\AI32-NC_ ,
   \AI32-O1_ );
P_MUX2 \I11(I1_AI32-FRAG_LNS  (GND,GND,\AI32-FI_ ,GND,\count[1] ,\AI32-NC_ );
P_BUF \I11(I1_AI32-FRAG_FB  (\AI32-FI_ ,\I11-ED_a );
P_AND6 \I11(I1_AI32-FRAG_LF  (enable_reg,GND,\count[0] ,GND,VCC,GND,\AI32-FI_ );
P_AND6 \I11(I1_AI32-FRAG_LA  (\I11-BCD_a ,GND,\I11-ED_a ,GND,\count[3] ,GND,
   \AI32-AI_ );
P_FF \I9(QL1_AH32-FRAG_LQ2  (\AH32-Q2D_ ,\AH32-QCI_ ,GND,GND,\count_reg[3] );
P_MUX2 \AH32-FRAG_LPS  (VCC,GND,\count[3] ,GND,VCC,\AH32-Q2D_ );
P_BUF \I9(QL1_AH32-FRAG_LQC  (clk,\AH32-QCI_ );
P_FF \I11(I2_AI31-FRAG_LQ2  (\AI31-Q2D_ ,\AI31-QCI_ ,GND,clear,\count[0] );
P_MUX2 \I11(I2_AI31-FRAG_LPS  (\AI31-O1_ ,GND,GND,GND,GND,\AI31-Q2D_ );
P_FF \I11(I2_AI31-FRAG_LQ  (\AI31-QD_ ,\AI31-QCI_ ,GND,clear,\count[3] );
P_BUF \I11(I2_AI31-FRAG_LQC  (clk,\AI31-QCI_ );
P_MUX3 \I11(I2_AI31-FRAG_LO  (\count[3] ,GND,VCC,\count[3] ,\AI31-MC_ ,GND,
   \AI31-O1_ ,\AI31-QD_ );
P_MUX2 \I11(I2_AI31-FRAG_LMS  (GND,GND,\AI31-FI_ ,GND,enable_reg,\AI31-MC_ );
P_MUX2 \I11(I2_AI31-FRAG_LN  (enable_reg,\count[0] ,\count[0] ,enable_reg,
   \AI31-NC_ ,\AI31-O1_ );
P_MUX2 \I11(I2_AI31-FRAG_LNS  (\count[0] ,GND,\AI31-FI_ ,GND,GND,\AI31-NC_ );
P_BUF \I11(I2_AI31-FRAG_FB  (\AI31-FI_ ,\I11-BCD_a );
P_AND6 \I11(I2_AI31-FRAG_LF  (\count[2] ,GND,\count[1] ,GND,\count[0] ,GND,
   \AI31-FI_ );
P_MUX2 \AG27-FRAG_LOS  (VCC,GND,\AG27-AI_ ,GND,VCC,\AG27-OC_ );
P_BUF \AG27-FRAG_AB  (\AG27-AI_ ,\count[0]_LRBUF0 );
P_AND6 \AG27-FRAG_LA  (\count[0] ,GND,VCC,GND,VCC,GND,\AG27-AI_ );
endmodule