example_en_16bit_s.prj

VHDL examples for counter design, use QuickLogic eclips

set_option -technology ECLIPSEII;
set_option -part ql8325;
set_option -package ps484;
project -result_file "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.qdf"
add_file -verilog "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.v"
add_file "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.sc"
add_file -vhdl -lib work "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.vhd"
add_file "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.sc"
add_file -verilog "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.v"
add_file "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.sc"
add_file -verilog "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.v"
add_file "C:/counter_name/example/speed_counter/speed_counter_16bit/example_en_16bit_s.sc"