example_en_16bit_s.vq

VHDL examples for counter design, use QuickLogic eclips

`timescale 1ps / 1ps

/* Verilog Header Created from SCS Schematic example_en_16bit_s.sch 
   Aug 14, 2003 12:15 */


module example_en_16bit_s( clear_in , clk_in, enable_in, count_out );
input clear_in, clk_in;
 output [15:0] count_out;
input enable_in;
supply0 GND;
supply1 VCC;
wire qldummy_wire;
wire \IO301-OUTMUXZ_ ;
wire \IO301-OUTFF_ ;
wire \IO301-OQQ_ ;
wire \IO301-OUTFFZ_ ;
wire \IO300-OUTMUXZ_ ;
wire \IO300-OUTFF_ ;
wire \IO300-OQQ_ ;
wire \IO300-OUTFFZ_ ;
wire \IO299-OUTMUXZ_ ;
wire \IO299-OUTFF_ ;
wire \IO299-OQQ_ ;
wire \IO299-OUTFFZ_ ;
wire \IO298-OUTMUXZ_ ;
wire \IO298-OUTFF_ ;
wire \IO298-OQQ_ ;
wire \IO298-OUTFFZ_ ;
wire \IO297-OUTMUXZ_ ;
wire \IO297-OUTFF_ ;
wire \IO297-OQQ_ ;
wire \IO297-OUTFFZ_ ;
wire \IO293-OUTMUXZ_ ;
wire \IO293-OUTFF_ ;
wire \IO293-OQQ_ ;
wire \IO293-OUTFFZ_ ;
wire \IO292-OUTMUXZ_ ;
wire \IO292-OUTFF_ ;
wire \IO292-OQQ_ ;
wire \IO292-OUTFFZ_ ;
wire \IO291-OUTMUXZ_ ;
wire \IO291-OUTFF_ ;
wire \IO291-OQQ_ ;
wire \IO291-OUTFFZ_ ;
wire \IO290-INMUXZ_ ;
wire \IO290-VREFZ_ ;
wire \IO290-INPUTZ_ ;
wire \IO288-OUTMUXZ_ ;
wire \IO288-OUTFF_ ;
wire \IO288-OQQ_ ;
wire \IO288-OUTFFZ_ ;
wire \IO287-OUTMUXZ_ ;
wire \IO287-OUTFF_ ;
wire \IO287-OQQ_ ;
wire \IO287-OUTFFZ_ ;
wire \IO286-OUTMUXZ_ ;
wire \IO286-OUTFF_ ;
wire \IO286-OQQ_ ;
wire \IO286-OUTFFZ_ ;
wire \IO285-OUTMUXZ_ ;
wire \IO285-OUTFF_ ;
wire \IO285-OQQ_ ;
wire \IO285-OUTFFZ_ ;
wire \IO280-OUTMUXZ_ ;
wire \IO280-OUTFF_ ;
wire \IO280-OQQ_ ;
wire \IO280-OUTFFZ_ ;
wire \IO279-OUTMUXZ_ ;
wire \IO279-OUTFF_ ;
wire \IO279-OQQ_ ;
wire \IO279-OUTFFZ_ ;
wire \IO276-OUTMUXZ_ ;
wire \IO276-OUTFF_ ;
wire \IO276-OQQ_ ;
wire \IO276-OUTFFZ_ ;
wire \IO275-OUTMUXZ_ ;
wire \IO275-OUTFF_ ;
wire \IO275-OQQ_ ;
wire \IO275-OUTFFZ_ ;
wire \PLLIN0-OP_ ;
wire \PLLIN2-OP_ ;
wire \B8-Q2D_ ;
wire \B8-QCI_ ;
wire \B8-QD_ ;
wire \B8-O1_ ;
wire \C7-Q2D_ ;
wire \C7-QCI_ ;
wire \C7-QD_ ;
wire \C7-MC_ ;
wire \C7-O1_ ;
wire \C7-NC_ ;
wire \C7-FI_ ;
wire \C7-AI_ ;
wire \B7-Q2D_ ;
wire \B7-QCI_ ;
wire \B7-QD_ ;
wire \B7-MC_ ;
wire \B7-O1_ ;
wire \B7-NC_ ;
wire \B7-FI_ ;
wire \B7-AI_ ;
wire \A7-Q2D_ ;
wire \A7-QCI_ ;
wire \A7-QD_ ;
wire \A7-O1_ ;
wire \C6-Q2D_ ;
wire \C6-QCI_ ;
wire \C6-QD_ ;
wire \C6-MC_ ;
wire \C6-O1_ ;
wire \C6-NC_ ;
wire \C6-FI_ ;
wire \C6-AI_ ;
wire \B6-Q2D_ ;
wire \B6-QCI_ ;
wire \B6-QD_ ;
wire \B6-MC_ ;
wire \B6-O1_ ;
wire \B6-NC_ ;
wire \B6-FI_ ;
wire \B6-AI_ ;
wire \A6-Q2D_ ;
wire \A6-QCI_ ;
wire \A6-QD_ ;
wire \A6-O1_ ;
wire \C5-QCI_ ;
wire \C5-QD_ ;
wire \C5-OC_ ;
wire \C5-O1_ ;
wire \C5-NC_ ;
wire \C5-FI_ ;
wire \C5-AI_ ;
wire \B5-QCI_ ;
wire \B5-QD_ ;
wire \B5-OC_ ;
wire \B5-O1_ ;
wire \B5-FI_ ;
wire \B5-AI_ ;
wire \A5-Q2D_ ;
wire \A5-QCI_ ;
wire \A5-QD_ ;
wire \A5-O1_ ;
wire \C4-QCI_ ;
wire \C4-QD_ ;
wire \C4-OC_ ;
wire \C4-O1_ ;
wire \C4-FI_ ;
wire \C4-AI_ ;
wire \B4-Q2D_ ;
wire \B4-QCI_ ;
wire \B4-QD_ ;
wire \B4-OC_ ;
wire \B4-MC_ ;
wire \B4-O1_ ;
wire \B4-FI_ ;
wire \B4-AI_ ;
wire \C3-Q2D_ ;
wire \C3-QCI_ ;
wire \C3-QD_ ;
wire \C3-MC_ ;
wire \C3-O1_ ;
wire \C3-NC_ ;
wire \C3-FI_ ;
wire \C3-AI_ ;
wire \B3-Q2D_ ;
wire \B3-QCI_ ;
wire \B3-QD_ ;
wire \B3-MC_ ;
wire \B3-O1_ ;
wire \B3-NC_ ;
wire \B3-FI_ ;
wire \B3-AI_ ;
wire \A3-Q2D_ ;
wire \A3-QCI_ ;
wire \A3-QD_ ;
wire \A3-O1_ ;
wire \C2-Q2D_ ;
wire \C2-QCI_ ;
wire \C2-QD_ ;
wire \C2-MC_ ;
wire \C2-O1_ ;
wire \C2-NC_ ;
wire \C2-FI_ ;
wire \C2-AI_ ;
wire \B2-Q2D_ ;
wire \B2-QCI_ ;
wire \B2-QD_ ;
wire \B2-MC_ ;
wire \B2-O1_ ;
wire \B2-NC_ ;
wire \B2-FI_ ;
wire \B2-AI_ ;
wire \A2-Q2D_ ;
wire \A2-QCI_ ;
wire \A2-QD_ ;
wire \A2-O1_ ;
wire \C1-Q2D_ ;
wire \C1-QCI_ ;
wire \C1-QD_ ;
wire \C1-O1_ ;
wire \B1-Q2D_ ;
wire \B1-QCI_ ;
wire \B1-QD_ ;
wire \B1-O1_ ;
wire \I9(I9(I21(I2-NZ ;
wire \I9(I9(I21(I2-OZ ;
wire \I9(I9(I21(I1-FZ ;
wire \I9(I9(I21(I1-NZ ;
wire \I9(I9(I21(I1-OZ ;
wire \I9(I9(I21-BCD_a ;
wire \I9(I9(I21-ABCDE_a ;
wire \I9(I9(I21-ED_a ;
wire \I9(I9(I20(I2-NZ ;
wire \I9(I9(I20(I2-OZ ;
wire \I9(I9(I20(I1-FZ ;
wire \I9(I9(I20(I1-NZ ;
wire \I9(I9(I20(I1-OZ ;
wire \I9(I9(I20-BCD_a ;
wire \I9(I9(I20-ABCDE_a ;
wire \I9(I9(I20-ED_a ;
wire \I9(I9(I19-Q2Z ;
wire \I9(I9(I19-NZ ;
wire \I9(I9(I19-OZ ;
wire \I9(I9(I19-AZ ;
wire \I9(I9(I14-Q2Z ;
wire \I9(I9(I14-NZ ;
wire \I9(I9(I14-OZ ;
wire \I9(I9(I14-AZ ;
wire \I9(I9-enable_1_a ;
wire \I9(I9-enable_buf_a ;
wire \I9(I8(I17(I2-NZ ;
wire \I9(I8(I17(I2-OZ ;
wire \I9(I8(I17(I1-FZ ;
wire \I9(I8(I17(I1-NZ ;
wire \I9(I8(I17(I1-OZ ;
wire \I9(I8(I17-BCD_a ;
wire \I9(I8(I17-ABCDE_a ;
wire \I9(I8(I17-ED_a ;
wire \I9(I8(I16(I2-NZ ;
wire \I9(I8(I16(I2-OZ ;
wire \I9(I8(I16(I1-FZ ;
wire \I9(I8(I16(I1-NZ ;
wire \I9(I8(I16(I1-OZ ;
wire \I9(I8(I16-BCD_a ;
wire \I9(I8(I16-ABCDE_a ;
wire \I9(I8(I16-ED_a ;
wire \I9(I8(I15-Q2Z ;
wire \I9(I8(I15-NZ ;
wire \I9(I8(I15-OZ ;
wire \I9(I8(I15-AZ ;
wire \I9(I8(I12-Q2Z ;
wire \I9(I8(I12-NZ ;
wire \I9(I8(I12-OZ ;
wire \I9(I8(I12-AZ ;
wire \I9(I8-enable_in2_a ;
wire \I9(I8-enable_in1_a ;
wire \I9(I8-enable_4_r ;
wire \I9(I8-enable_3_r ;
wire \I9-enable_1 ;
wire \I9-enable_2 ;
wire \I2(I2-FZ ;
wire \I2(I2-NZ ;
wire \I2(I2-OZ ;
wire \I2(I2-AZ ;
wire \I2-Q2 ;
wire \I1(I9(I2-FZ ;
wire \I1(I9(I2-NZ ;
wire \I1(I9(I2-OZ ;
wire \I1(I9(I2-AZ ;
wire \I1(I8(I2-FZ ;
wire \I1(I8(I2-NZ ;
wire \I1(I8(I2-OZ ;
wire \I1(I8(I2-AZ ;
wire \I1(I7(I2-FZ ;
wire \I1(I7(I2-NZ ;
wire \I1(I7(I2-OZ ;
wire \I1(I7(I2-AZ ;
wire \I1(I6(I2-FZ ;
wire \I1(I6(I2-NZ ;
wire \I1(I6(I2-OZ ;
wire \I1(I6(I2-AZ ;
wire \I1(I5(I2-FZ ;
wire \I1(I5(I2-NZ ;
wire \I1(I5(I2-OZ ;
wire \I1(I5(I2-AZ ;
wire \I1(I4(I2-FZ ;
wire \I1(I4(I2-NZ ;
wire \I1(I4(I2-OZ ;
wire \I1(I4(I2-AZ ;
wire \I1(I3(I2-FZ ;
wire \I1(I3(I2-NZ ;
wire \I1(I3(I2-OZ ;
wire \I1(I3(I2-AZ ;
wire \I1(I2(I2-FZ ;
wire \I1(I2(I2-NZ ;
wire \I1(I2(I2-OZ ;
wire \I1(I2(I2-AZ ;
wire \count_reg[0] ;
wire \count_reg[1] ;
wire \count_reg[2] ;
wire \count_reg[3] ;
wire \count_reg[4] ;
wire \count_reg[5] ;
wire \count_reg[6] ;
wire \count_reg[7] ;
wire \count_reg[8] ;
wire \count_reg[9] ;
wire \count_reg[10] ;
wire \count_reg[11] ;
wire \count_reg[12] ;
wire \count_reg[13] ;
wire \count_reg[14] ;
wire \count_reg[15] ;
wire \count[0] ;
wire \count[1] ;
wire \count[2] ;
wire \count[3] ;
wire \count[4] ;
wire \count[5] ;
wire \count[6] ;
wire \count[7] ;
wire \count[8] ;
wire \count[9] ;
wire \count[10] ;
wire \count[11] ;
wire \count[12] ;
wire \count[13] ;
wire \count[14] ;
wire \count[15] ;
wire enable_reg;
wire enable;
wire clear;
wire clk;

initial
begin
	$display("\nOPERATING RANGE: Commercial");
	$display("\nSPEED GRADE: 8\n");
end