example_en_32bit_a.vq

VHDL examples for counter design, use QuickLogic eclips

P_MUX2 \I9(I16(I7(I8(I1_F6-FRAG_LNS  (GND,GND,\F6-FI_ ,GND,\count[17]_LRBUF6 ,
   \F6-NC_ );
P_BUF \I9(I16(I7(I8(I1_F6-FRAG_FB  (\F6-FI_ ,\I9(I16(I7(I8-ED_a );
P_AND6 \I9(I16(I7(I8(I1_F6-FRAG_LF  (\I9-enable32bit_h_a ,GND,\count[16] ,GND,
   VCC,GND,\F6-FI_ );
P_BUF \I9(I16(I7(I8(I1_F6-FRAG_AB  (\F6-AI_ ,\I9(I16(I7-enableh4bit );
P_AND6 \I9(I16(I7(I8(I1_F6-FRAG_LA  (\I9(I16(I7(I8-BCD_a ,GND,
   \I9(I16(I7(I8-ED_a ,GND,\count[19] ,GND,\F6-AI_ );
P_BUF \I9(I1_E6-FRAG_OB  (\E6-QD_ ,\I9-enable32bit_h_a );
P_MUX3 \I9(I1_E6-FRAG_LO  (GND,GND,GND,GND,GND,\E6-OC_ ,\E6-O1_ ,\E6-QD_ );
P_MUX2 \I9(I1_E6-FRAG_LOS  (GND,GND,\E6-AI_ ,GND,\count[3] ,\E6-OC_ );
P_MUX2 \I9(I1_E6-FRAG_LN  (GND,GND,\count[2] ,GND,\E6-NC_ ,\E6-O1_ );
P_MUX2 \I9(I1_E6-FRAG_LNS  (GND,GND,\E6-FI_ ,GND,\count[1] ,\E6-NC_ );
P_AND6 \I9(I1_E6-FRAG_LF  (\count[0] ,GND,\I9-enable_32bit1_a ,GND,enable,GND,
   \E6-FI_ );
P_AND6 \I9(I1_E6-FRAG_LA  (\count[6] ,GND,\count[5] ,GND,\count[4] ,GND,
   \E6-AI_ );
P_FF \I9(I15(I7(I8(I2_D6-FRAG_LQ2  (\D6-Q2D_ ,\D6-QCI_ ,GND,clear,\count[0] );
P_MUX2 \I9(I15(I7(I8(I2_D6-FRAG_LPS  (\D6-O1_ ,GND,GND,GND,GND,\D6-Q2D_ );
P_FF \I9(I15(I7(I8(I2_D6-FRAG_LQ  (\D6-QD_ ,\D6-QCI_ ,GND,clear,\count[3] );
P_BUF \I9(I15(I7(I8(I2_D6-FRAG_LQC  (clk,\D6-QCI_ );
P_MUX3 \I9(I15(I7(I8(I2_D6-FRAG_LO  (\count[3]_LRBUF13 ,GND,VCC,
   \count[3]_LRBUF13 ,\D6-MC_ ,GND,\D6-O1_ ,\D6-QD_ );
P_MUX2 \I9(I15(I7(I8(I2_D6-FRAG_LMS  (GND,GND,\D6-FI_ ,GND,enable,\D6-MC_ );
P_MUX2 \I9(I15(I7(I8(I2_D6-FRAG_LN  (enable,\count[0]_LRBUF5 ,
   \count[0]_LRBUF5 ,enable,\D6-NC_ ,\D6-O1_ );
P_MUX2 \I9(I15(I7(I8(I2_D6-FRAG_LNS  (\count[0]_LRBUF5 ,GND,\D6-FI_ ,GND,GND,
   \D6-NC_ );
P_BUF \I9(I15(I7(I8(I2_D6-FRAG_FB  (\D6-FI_ ,\I9(I15(I7(I8-BCD_a );
P_AND6 \I9(I15(I7(I8(I2_D6-FRAG_LF  (\count[2]_LRBUF10 ,GND,\count[1]_LRBUF4 ,
   GND,\count[0]_LRBUF5 ,GND,\D6-FI_ );
P_BUF \D6-FRAG_AB  (\D6-AI_ ,\count[1]_LRBUF4 );
P_AND6 \D6-FRAG_LA  (\count[1] ,GND,VCC,GND,VCC,GND,\D6-AI_ );
P_FF \I5(I5(I2_C6-FRAG_LQ2  (\C6-Q2D_ ,\C6-QCI_ ,GND,GND,\count_reg[1] );
P_MUX2 \I5(I5(I2_C6-FRAG_LPS  (\C6-O1_ ,GND,\count[1]_LRBUF14 ,GND,VCC,
   \C6-Q2D_ );
P_FF \I5(I5(I2_C6-FRAG_LQ  (\C6-QD_ ,\C6-QCI_ ,GND,GND,\count_reg[0] );
P_BUF \I5(I5(I2_C6-FRAG_LQC  (clk,\C6-QCI_ );
P_MUX3 \C6-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\C6-O1_ ,\C6-QD_ );
P_MUX2 \I5(I5(I2_C6-FRAG_LN  (VCC,GND,\count[0]_LRBUF5 ,GND,VCC,\C6-O1_ );
P_BUF \C6-FRAG_FB  (\C6-FI_ ,\count[0]_LRBUF5 );
P_AND6 \C6-FRAG_LF  (\count[0] ,GND,VCC,GND,VCC,GND,\C6-FI_ );
P_BUF \C6-FRAG_AB  (\C6-AI_ ,\count[3]_LRBUF13 );
P_AND6 \C6-FRAG_LA  (\count[3] ,GND,VCC,GND,VCC,GND,\C6-AI_ );
P_BUF \H5-FRAG_OB  (\H5-QD_ ,\count[22]_LRBUF12 );
P_MUX3 \H5-FRAG_LO  (VCC,GND,\count[22] ,GND,VCC,GND,VCC,\H5-QD_ );
P_FF \I9(I16(I7(I9(I1_G5-FRAG_LQ2  (\G5-Q2D_ ,\G5-QCI_ ,GND,clear,\count[22] );
P_MUX2 \I9(I16(I7(I9(I1_G5-FRAG_LPS  (\G5-O1_ ,GND,GND,GND,GND,\G5-Q2D_ );
P_FF \I9(I16(I7(I9(I1_G5-FRAG_LQ  (\G5-QD_ ,\G5-QCI_ ,GND,clear,\count[21] );
P_BUF \I9(I16(I7(I9(I1_G5-FRAG_LQC  (clk,\G5-QCI_ );
P_MUX3 \I9(I16(I7(I9(I1_G5-FRAG_LO  (\I9(I16(I7(I9-ED_a ,\count[21]_LRBUF16 ,
   \count[21]_LRBUF16 ,\I9(I16(I7(I9-ED_a ,\G5-MC_ ,GND,\G5-O1_ ,\G5-QD_ );
P_MUX2 \I9(I16(I7(I9(I1_G5-FRAG_LMS  (\count[21]_LRBUF16 ,GND,\G5-FI_ ,GND,GND,
   \G5-MC_ );
P_MUX2 \I9(I16(I7(I9(I1_G5-FRAG_LN  (\count[22]_LRBUF12 ,GND,VCC,
   \count[22]_LRBUF12 ,\G5-NC_ ,\G5-O1_ );
P_MUX2 \I9(I16(I7(I9(I1_G5-FRAG_LNS  (GND,GND,\G5-FI_ ,GND,\count[21]_LRBUF16 ,
   \G5-NC_ );
P_BUF \I9(I16(I7(I9(I1_G5-FRAG_FB  (\G5-FI_ ,\I9(I16(I7(I9-ED_a );
P_AND6 \I9(I16(I7(I9(I1_G5-FRAG_LF  (\I9(I16(I7-enableh4bit ,GND,\count[20] ,
   GND,VCC,GND,\G5-FI_ );
P_AND6 \I9(I16(I7(I9(I1_G5-FRAG_LA  (\I9(I16(I7(I9-BCD_a ,GND,
   \I9(I16(I7(I9-ED_a ,GND,\count[23]_LRBUF11 ,GND,\G5-AI_ );
P_FF \I6(I5(I2_F5-FRAG_LQ2  (\F5-Q2D_ ,\F5-QCI_ ,GND,GND,\count_reg[17] );
P_MUX2 \I6(I5(I2_F5-FRAG_LPS  (\F5-O1_ ,GND,\count[17]_LRBUF6 ,GND,VCC,
   \F5-Q2D_ );
P_FF \I6(I5(I2_F5-FRAG_LQ  (\F5-QD_ ,\F5-QCI_ ,GND,GND,\count_reg[16] );
P_BUF \I6(I5(I2_F5-FRAG_LQC  (clk,\F5-QCI_ );
P_MUX3 \F5-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\F5-O1_ ,\F5-QD_ );
P_MUX2 \I6(I5(I2_F5-FRAG_LN  (VCC,GND,\count[16] ,GND,VCC,\F5-O1_ );
P_BUF \I9(I16(I7(I1_F5-FRAG_FB  (\F5-FI_ ,\I9(I16(I7-en_8bit2_a );
P_AND6 \I9(I16(I7(I1_F5-FRAG_LF  (\count[22] ,GND,\count[23] ,GND,
   \I9-enable32bit_h_a ,GND,\F5-FI_ );
P_BUF \I9(I16(I7(I1_F5-FRAG_AB  (\F5-AI_ ,\I9(I16(I7-en_8bit1_a );
P_AND6 \I9(I16(I7(I1_F5-FRAG_LA  (\count[16] ,GND,\count[17] ,GND,\count[18] ,
   GND,\F5-AI_ );
P_FF \I9(I16(I7(I8(I2_E5-FRAG_LQ2  (\E5-Q2D_ ,\E5-QCI_ ,GND,clear,\count[16] );
P_MUX2 \I9(I16(I7(I8(I2_E5-FRAG_LPS  (\E5-O1_ ,GND,GND,GND,GND,\E5-Q2D_ );
P_FF \I9(I16(I7(I8(I2_E5-FRAG_LQ  (\E5-QD_ ,\E5-QCI_ ,GND,clear,\count[19] );
P_BUF \I9(I16(I7(I8(I2_E5-FRAG_LQC  (clk,\E5-QCI_ );
P_MUX3 \I9(I16(I7(I8(I2_E5-FRAG_LO  (\count[19] ,GND,VCC,\count[19] ,\E5-MC_ ,
   GND,\E5-O1_ ,\E5-QD_ );
P_MUX2 \I9(I16(I7(I8(I2_E5-FRAG_LMS  (GND,GND,\E5-FI_ ,GND,
   \I9-enable32bit_h_a_LRBUF20 ,\E5-MC_ );
P_MUX2 \I9(I16(I7(I8(I2_E5-FRAG_LN  (\I9-enable32bit_h_a_LRBUF20 ,\count[16] ,
   \count[16] ,\I9-enable32bit_h_a_LRBUF20 ,\E5-NC_ ,\E5-O1_ );
P_MUX2 \I9(I16(I7(I8(I2_E5-FRAG_LNS  (\count[16] ,GND,\E5-FI_ ,GND,GND,
   \E5-NC_ );
P_BUF \I9(I16(I7(I8(I2_E5-FRAG_FB  (\E5-FI_ ,\I9(I16(I7(I8-BCD_a );
P_AND6 \I9(I16(I7(I8(I2_E5-FRAG_LF  (\count[18] ,GND,\count[17] ,GND,
   \count[16] ,GND,\E5-FI_ );
P_BUF \E5-FRAG_AB  (\E5-AI_ ,\count[17]_LRBUF6 );
P_AND6 \E5-FRAG_LA  (\count[17] ,GND,VCC,GND,VCC,GND,\E5-AI_ );
P_BUF \I9(I2_D5-FRAG_OB  (\D5-QD_ ,\I9-enable_32bit1_a );
P_MUX3 \I9(I2_D5-FRAG_LO  (GND,GND,GND,GND,GND,\D5-OC_ ,\D5-O1_ ,\D5-QD_ );
P_MUX2 \I9(I2_D5-FRAG_LOS  (GND,GND,\D5-AI_ ,GND,\count[12] ,\D5-OC_ );
P_MUX2 \I9(I2_D5-FRAG_LN  (GND,GND,\count[11] ,GND,\D5-NC_ ,\D5-O1_ );
P_MUX2 \I9(I2_D5-FRAG_LNS  (GND,GND,\D5-FI_ ,GND,\count[10] ,\D5-NC_ );
P_AND6 \I9(I2_D5-FRAG_LF  (\count[9] ,GND,\count[8] ,GND,\count[7] ,GND,
   \D5-FI_ );
P_AND6 \I9(I2_D5-FRAG_LA  (\count[15] ,GND,\count[14] ,GND,\count[13] ,GND,
   \D5-AI_ );
P_FF \I9(I15(I6(I4(I2_C5-FRAG_LQ2  (\C5-Q2D_ ,\C5-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[12] );
P_MUX2 \I9(I15(I6(I4(I2_C5-FRAG_LPS  (\C5-O1_ ,GND,GND,GND,GND,\C5-Q2D_ );
P_FF \I9(I15(I6(I4(I2_C5-FRAG_LQ  (\C5-QD_ ,\C5-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[15] );
P_BUF \I9(I15(I6(I4(I2_C5-FRAG_LQC  (clk,\C5-QCI_ );
P_MUX3 \I9(I15(I6(I4(I2_C5-FRAG_LO  (\count[15] ,GND,VCC,\count[15] ,\C5-MC_ ,
   GND,\C5-O1_ ,\C5-QD_ );
P_MUX2 \I9(I15(I6(I4(I2_C5-FRAG_LMS  (GND,GND,\C5-FI_ ,GND,
   \I9(I15(I6-enable_8bit ,\C5-MC_ );
P_MUX2 \I9(I15(I6(I4(I2_C5-FRAG_LN  (\I9(I15(I6-enable_8bit ,
   \count[12]_LRBUF3 ,\count[12]_LRBUF3 ,\I9(I15(I6-enable_8bit ,\C5-NC_ ,
   \C5-O1_ );
P_MUX2 \I9(I15(I6(I4(I2_C5-FRAG_LNS  (\count[12]_LRBUF3 ,GND,\C5-FI_ ,GND,GND,
   \C5-NC_ );
P_BUF \I9(I15(I6(I4(I2_C5-FRAG_FB  (\C5-FI_ ,\I9(I15(I6(I4-BCD_a );
P_AND6 \I9(I15(I6(I4(I2_C5-FRAG_LF  (\count[14] ,GND,\count[13]_LRBUF2 ,GND,
   \count[12]_LRBUF3 ,GND,\C5-FI_ );
P_BUF \C5-FRAG_AB  (\C5-AI_ ,\count[13]_LRBUF2 );
P_AND6 \C5-FRAG_LA  (\count[13] ,GND,VCC,GND,VCC,GND,\C5-AI_ );
P_FF \I6(I4(I2_B5-FRAG_LQ2  (\B5-Q2D_ ,\B5-QCI_ ,GND,GND,\count_reg[19] );
P_MUX2 \I6(I4(I2_B5-FRAG_LPS  (\B5-O1_ ,GND,\count[19] ,GND,VCC,\B5-Q2D_ );
P_FF \I6(I4(I2_B5-FRAG_LQ  (\B5-QD_ ,\B5-QCI_ ,GND,GND,\count_reg[18] );
P_BUF \I6(I4(I2_B5-FRAG_LQC  (clk,\B5-QCI_ );
P_MUX3 \B5-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\B5-O1_ ,\B5-QD_ );
P_MUX2 \I6(I4(I2_B5-FRAG_LN  (VCC,GND,\count[18] ,GND,VCC,\B5-O1_ );
P_FF \I6(I2(I2_H4-FRAG_LQ2  (\H4-Q2D_ ,\H4-QCI_ ,GND,GND,\count_reg[23] );
P_MUX2 \I6(I2(I2_H4-FRAG_LPS  (\H4-O1_ ,GND,\count[23]_LRBUF11 ,GND,VCC,
   \H4-Q2D_ );
P_FF \I6(I2(I2_H4-FRAG_LQ  (\H4-QD_ ,\H4-QCI_ ,GND,GND,\count_reg[22] );
P_BUF \I6(I2(I2_H4-FRAG_LQC  (clk,\H4-QCI_ );
P_MUX3 \H4-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\H4-O1_ ,\H4-QD_ );
P_MUX2 \I6(I2(I2_H4-FRAG_LN  (VCC,GND,\count[22]_LRBUF12 ,GND,VCC,\H4-O1_ );
P_FF \I9(I16(I6(I4(I1_G4-FRAG_LQ2  (\G4-Q2D_ ,\G4-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[30] );
P_MUX2 \I9(I16(I6(I4(I1_G4-FRAG_LPS  (\G4-O1_ ,GND,GND,GND,GND,\G4-Q2D_ );
P_FF \I9(I16(I6(I4(I1_G4-FRAG_LQ  (\G4-QD_ ,\G4-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[29] );
P_BUF \I9(I16(I6(I4(I1_G4-FRAG_LQC  (clk,\G4-QCI_ );
P_MUX3 \I9(I16(I6(I4(I1_G4-FRAG_LO  (\I9(I16(I6(I4-ED_a ,\count[29] ,
   \count[29] ,\I9(I16(I6(I4-ED_a ,\G4-MC_ ,GND,\G4-O1_ ,\G4-QD_ );
P_MUX2 \I9(I16(I6(I4(I1_G4-FRAG_LMS  (\count[29] ,GND,\G4-FI_ ,GND,GND,
   \G4-MC_ );
P_MUX2 \I9(I16(I6(I4(I1_G4-FRAG_LN  (\count[30] ,GND,VCC,\count[30] ,\G4-NC_ ,
   \G4-O1_ );
P_MUX2 \I9(I16(I6(I4(I1_G4-FRAG_LNS  (GND,GND,\G4-FI_ ,GND,
   \I9(I16(I6-enable_8bit ,\G4-NC_ );
P_BUF \I9(I16(I6(I4(I1_G4-FRAG_FB  (\G4-FI_ ,\I9(I16(I6(I4-ED_a );
P_AND6 \I9(I16(I6(I4(I1_G4-FRAG_LF  (\count[29] ,GND,\count[28] ,GND,VCC,GND,
   \G4-FI_ );
P_AND6 \I9(I16(I6(I4(I1_G4-FRAG_LA  (\I9(I16(I6(I4-BCD_a ,GND,
   \I9(I16(I6(I4-ED_a ,GND,\count[31] ,GND,\G4-AI_ );
P_BUF \F4-FRAG_OB  (\F4-QD_ ,\I9-enable32bit_h_a_LRBUF20 );
P_MUX3 \F4-FRAG_LO  (VCC,GND,\I9-enable32bit_h_a ,GND,VCC,GND,\F4-O1_ ,
   \F4-QD_ );
P_BUF \F4-FRAG_NB  (\F4-O1_ ,\count[23]_LRBUF11 );
P_MUX2 \F4-FRAG_LN  (VCC,GND,\count[23] ,GND,VCC,\F4-O1_ );
P_BUF \I9(I16(I7(I2_F4-FRAG_FB  (\F4-FI_ ,\I9(I16-enable_8bit_h );
P_AND6 \I9(I16(I7(I2_F4-FRAG_LF  (\I9(I16(I7-en_8bit1_a ,GND,
   \I9(I16(I7-en_8bit2_a ,GND,\I9(I16(I7-en_8bit3_a ,GND,\F4-FI_ );
P_BUF \I9(I16(I7(I2_F4-FRAG_AB  (\F4-AI_ ,\I9(I16(I7-en_8bit3_a );
P_AND6 \I9(I16(I7(I2_F4-FRAG_LA  (\count[19] ,GND,\count[20] ,GND,\count[21] ,
   GND,\F4-AI_ );
P_FF \I9(I16(I6(I5(I1_E4-FRAG_LQ2  (\E4-Q2D_ ,\E4-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[26] );
P_MUX2 \I9(I16(I6(I5(I1_E4-FRAG_LPS  (\E4-O1_ ,GND,GND,GND,GND,\E4-Q2D_ );
P_FF \I9(I16(I6(I5(I1_E4-FRAG_LQ  (\E4-QD_ ,\E4-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[25] );
P_BUF \I9(I16(I6(I5(I1_E4-FRAG_LQC  (clk,\E4-QCI_ );
P_MUX3 \I9(I16(I6(I5(I1_E4-FRAG_LO  (\I9(I16(I6(I5-ED_a ,\count[25]_LRBUF9 ,
   \count[25]_LRBUF9 ,\I9(I16(I6(I5-ED_a ,\E4-MC_ ,GND,\E4-O1_ ,\E4-QD_ );
P_MUX2 \I9(I16(I6(I5(I1_E4-FRAG_LMS  (\count[25]_LRBUF9 ,GND,\E4-FI_ ,GND,GND,
   \E4-MC_ );
P_MUX2 \I9(I16(I6(I5(I1_E4-FRAG_LN  (\count[26] ,GND,VCC,\count[26] ,\E4-NC_ ,
   \E4-O1_ );
P_MUX2 \I9(I16(I6(I5(I1_E4-FRAG_LNS  (GND,GND,\E4-FI_ ,GND,\count[25]_LRBUF9 ,
   \E4-NC_ );
P_BUF \I9(I16(I6(I5(I1_E4-FRAG_FB  (\E4-FI_ ,\I9(I16(I6(I5-ED_a );
P_AND6 \I9(I16(I6(I5(I1_E4-FRAG_LF  (clear,GND,\count[24] ,GND,VCC,GND,
   \E4-FI_ );
P_BUF \I9(I16(I6(I5(I1_E4-FRAG_AB  (\E4-AI_ ,\I9(I16(I6-enable_8bit );
P_AND6 \I9(I16(I6(I5(I1_E4-FRAG_LA  (\I9(I16(I6(I5-BCD_a ,GND,
   \I9(I16(I6(I5-ED_a ,GND,\count[27] ,GND,\E4-AI_ );
P_FF \I9(I15(I6(I5(I1_D4-FRAG_LQ2  (\D4-Q2D_ ,\D4-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[10] );
P_MUX2 \I9(I15(I6(I5(I1_D4-FRAG_LPS  (\D4-O1_ ,GND,GND,GND,GND,\D4-Q2D_ );
P_FF \I9(I15(I6(I5(I1_D4-FRAG_LQ  (\D4-QD_ ,\D4-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[9] );
P_BUF \I9(I15(I6(I5(I1_D4-FRAG_LQC  (clk,\D4-QCI_ );
P_MUX3 \I9(I15(I6(I5(I1_D4-FRAG_LO  (\I9(I15(I6(I5-ED_a ,\count[9]_LRBUF18 ,
   \count[9]_LRBUF18 ,\I9(I15(I6(I5-ED_a ,\D4-MC_ ,GND,\D4-O1_ ,\D4-QD_ );
P_MUX2 \I9(I15(I6(I5(I1_D4-FRAG_LMS  (\count[9]_LRBUF18 ,GND,\D4-FI_ ,GND,GND,
   \D4-MC_ );
P_MUX2 \I9(I15(I6(I5(I1_D4-FRAG_LN  (\count[10] ,GND,VCC,\count[10] ,\D4-NC_ ,
   \D4-O1_ );
P_MUX2 \I9(I15(I6(I5(I1_D4-FRAG_LNS  (GND,GND,\D4-FI_ ,GND,\count[9]_LRBUF18 ,
   \D4-NC_ );
P_BUF \I9(I15(I6(I5(I1_D4-FRAG_FB  (\D4-FI_ ,\I9(I15(I6(I5-ED_a );
P_AND6 \I9(I15(I6(I5(I1_D4-FRAG_LF  (clear,GND,\count[8] ,GND,VCC,GND,\D4-FI_ );
P_BUF \I9(I15(I6(I5(I1_D4-FRAG_AB  (\D4-AI_ ,\I9(I15(I6-enable_8bit );
P_AND6 \I9(I15(I6(I5(I1_D4-FRAG_LA  (\I9(I15(I6(I5-BCD_a ,GND,
   \I9(I15(I6(I5-ED_a ,GND,\count[11] ,GND,\D4-AI_ );
P_FF \I9(I15(I6(I4(I1_C4-FRAG_LQ2  (\C4-Q2D_ ,\C4-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[14] );
P_MUX2 \I9(I15(I6(I4(I1_C4-FRAG_LPS  (\C4-O1_ ,GND,GND,GND,GND,\C4-Q2D_ );
P_FF \I9(I15(I6(I4(I1_C4-FRAG_LQ  (\C4-QD_ ,\C4-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[13] );
P_BUF \I9(I15(I6(I4(I1_C4-FRAG_LQC  (clk,\C4-QCI_ );
P_MUX3 \I9(I15(I6(I4(I1_C4-FRAG_LO  (\I9(I15(I6(I4-ED_a ,\count[13]_LRBUF2 ,
   \count[13]_LRBUF2 ,\I9(I15(I6(I4-ED_a ,\C4-MC_ ,GND,\C4-O1_ ,\C4-QD_ );
P_MUX2 \I9(I15(I6(I4(I1_C4-FRAG_LMS  (\count[13]_LRBUF2 ,GND,\C4-FI_ ,GND,GND,
   \C4-MC_ );
P_MUX2 \I9(I15(I6(I4(I1_C4-FRAG_LN  (\count[14] ,GND,VCC,\count[14] ,\C4-NC_ ,
   \C4-O1_ );
P_MUX2 \I9(I15(I6(I4(I1_C4-FRAG_LNS  (GND,GND,\C4-FI_ ,GND,
   \I9(I15(I6-enable_8bit ,\C4-NC_ );
P_BUF \I9(I15(I6(I4(I1_C4-FRAG_FB  (\C4-FI_ ,\I9(I15(I6(I4-ED_a );
P_AND6 \I9(I15(I6(I4(I1_C4-FRAG_LF  (\count[13]_LRBUF2 ,GND,\count[12]_LRBUF3 ,
   GND,VCC,GND,\C4-FI_ );
P_AND6 \I9(I15(I6(I4(I1_C4-FRAG_LA  (\I9(I15(I6(I4-BCD_a ,GND,
   \I9(I15(I6(I4-ED_a ,GND,\count[15] ,GND,\C4-AI_ );
P_FF \I5(I6(I2_B4-FRAG_LQ2  (\B4-Q2D_ ,\B4-QCI_ ,GND,GND,\count_reg[15] );
P_MUX2 \I5(I6(I2_B4-FRAG_LPS  (\B4-O1_ ,GND,\count[15] ,GND,VCC,\B4-Q2D_ );
P_FF \I5(I6(I2_B4-FRAG_LQ  (\B4-QD_ ,\B4-QCI_ ,GND,GND,\count_reg[14] );
P_BUF \I5(I6(I2_B4-FRAG_LQC  (clk,\B4-QCI_ );
P_MUX3 \B4-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\B4-O1_ ,\B4-QD_ );
P_MUX2 \I5(I6(I2_B4-FRAG_LN  (VCC,GND,\count[14]_LRBUF19 ,GND,VCC,\B4-O1_ );
P_MUX2 \H3-FRAG_LOS  (VCC,GND,\H3-AI_ ,GND,VCC,\H3-OC_ );
P_BUF \H3-FRAG_AB  (\H3-AI_ ,\count[21]_LRBUF16 );
P_AND6 \H3-FRAG_LA  (\count[21] ,GND,VCC,GND,VCC,GND,\H3-AI_ );
P_FF \I9(I16(I6(I4(I2_G3-FRAG_LQ2  (\G3-Q2D_ ,\G3-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[28] );
P_MUX2 \I9(I16(I6(I4(I2_G3-FRAG_LPS  (\G3-O1_ ,GND,GND,GND,GND,\G3-Q2D_ );
P_FF \I9(I16(I6(I4(I2_G3-FRAG_LQ  (\G3-QD_ ,\G3-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[31] );
P_BUF \I9(I16(I6(I4(I2_G3-FRAG_LQC  (clk,\G3-QCI_ );
P_MUX3 \I9(I16(I6(I4(I2_G3-FRAG_LO  (\count[31] ,GND,VCC,\count[31] ,\G3-MC_ ,
   GND,\G3-O1_ ,\G3-QD_ );
P_MUX2 \I9(I16(I6(I4(I2_G3-FRAG_LMS  (GND,GND,\G3-FI_ ,GND,
   \I9(I16(I6-enable_8bit ,\G3-MC_ );
P_MUX2 \I9(I16(I6(I4(I2_G3-FRAG_LN  (\I9(I16(I6-enable_8bit ,\count[28] ,
   \count[28] ,\I9(I16(I6-enable_8bit ,\G3-NC_ ,\G3-O1_ );
P_MUX2 \I9(I16(I6(I4(I2_G3-FRAG_LNS  (\count[28] ,GND,\G3-FI_ ,GND,GND,
   \G3-NC_ );
P_BUF \I9(I16(I6(I4(I2_G3-FRAG_FB  (\G3-FI_ ,\I9(I16(I6(I4-BCD_a );
P_AND6 \I9(I16(I6(I4(I2_G3-FRAG_LF  (\count[30] ,GND,\count[29] ,GND,
   \count[28] ,GND,\G3-FI_ );
P_FF \I9(I16(I6(I5(I2_E3-FRAG_LQ2  (\E3-Q2D_ ,\E3-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[24] );
P_MUX2 \I9(I16(I6(I5(I2_E3-FRAG_LPS  (\E3-O1_ ,GND,GND,GND,GND,\E3-Q2D_ );
P_FF \I9(I16(I6(I5(I2_E3-FRAG_LQ  (\E3-QD_ ,\E3-QCI_ ,GND,
   \I9(I16-enable_8bit_h ,\count[27] );
P_BUF \I9(I16(I6(I5(I2_E3-FRAG_LQC  (clk,\E3-QCI_ );
P_MUX3 \I9(I16(I6(I5(I2_E3-FRAG_LO  (\count[27] ,GND,VCC,\count[27] ,\E3-MC_ ,
   GND,\E3-O1_ ,\E3-QD_ );
P_MUX2 \I9(I16(I6(I5(I2_E3-FRAG_LMS  (GND,GND,\E3-FI_ ,GND,clear_buf1,\E3-MC_ );
P_MUX2 \I9(I16(I6(I5(I2_E3-FRAG_LN  (clear_buf1,\count[24] ,\count[24] ,
   clear_buf1,\E3-NC_ ,\E3-O1_ );
P_MUX2 \I9(I16(I6(I5(I2_E3-FRAG_LNS  (\count[24] ,GND,\E3-FI_ ,GND,GND,
   \E3-NC_ );
P_BUF \I9(I16(I6(I5(I2_E3-FRAG_FB  (\E3-FI_ ,\I9(I16(I6(I5-BCD_a );
P_AND6 \I9(I16(I6(I5(I2_E3-FRAG_LF  (\count[26] ,GND,\count[25] ,GND,
   \count[24] ,GND,\E3-FI_ );
P_BUF \E3-FRAG_AB  (\E3-AI_ ,\count[25]_LRBUF9 );
P_AND6 \E3-FRAG_LA  (\count[25] ,GND,VCC,GND,VCC,GND,\E3-AI_ );
P_FF \I9(I15(I6(I5(I2_D3-FRAG_LQ2  (\D3-Q2D_ ,\D3-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[8] );
P_MUX2 \I9(I15(I6(I5(I2_D3-FRAG_LPS  (\D3-O1_ ,GND,GND,GND,GND,\D3-Q2D_ );
P_FF \I9(I15(I6(I5(I2_D3-FRAG_LQ  (\D3-QD_ ,\D3-QCI_ ,GND,
   \I9(I15-enable_8bit_h ,\count[11] );
P_BUF \I9(I15(I6(I5(I2_D3-FRAG_LQC  (clk,\D3-QCI_ );
P_MUX3 \I9(I15(I6(I5(I2_D3-FRAG_LO  (\count[11] ,GND,VCC,\count[11] ,\D3-MC_ ,
   GND,\D3-O1_ ,\D3-QD_ );
P_MUX2 \I9(I15(I6(I5(I2_D3-FRAG_LMS  (GND,GND,\D3-FI_ ,GND,clear_buf1,\D3-MC_ );
P_MUX2 \I9(I15(I6(I5(I2_D3-FRAG_LN  (clear_buf1,\count[8] ,\count[8] ,
   clear_buf1,\D3-NC_ ,\D3-O1_ );
P_MUX2 \I9(I15(I6(I5(I2_D3-FRAG_LNS  (\count[8] ,GND,\D3-FI_ ,GND,GND,\D3-NC_ );
P_BUF \I9(I15(I6(I5(I2_D3-FRAG_FB  (\D3-FI_ ,\I9(I15(I6(I5-BCD_a );
P_AND6 \I9(I15(I6(I5(I2_D3-FRAG_LF  (\count[10] ,GND,\count[9]_LRBUF15 ,GND,
   \count[8] ,GND,\D3-FI_ );
P_BUF \D3-FRAG_AB  (\D3-AI_ ,\count[9]_LRBUF15 );
P_AND6 \D3-FRAG_LA  (\count[9] ,GND,VCC,GND,VCC,GND,\D3-AI_ );
P_FF \I5(I8(I2_C3-FRAG_LQ2  (\C3-Q2D_ ,\C3-QCI_ ,GND,GND,\count_reg[11] );
P_MUX2 \I5(I8(I2_C3-FRAG_LPS  (\C3-O1_ ,GND,\count[11] ,GND,VCC,\C3-Q2D_ );
P_FF \I5(I8(I2_C3-FRAG_LQ  (\C3-QD_ ,\C3-QCI_ ,GND,GND,\count_reg[10] );
P_BUF \I5(I8(I2_C3-FRAG_LQC  (clk,\C3-QCI_ );
P_MUX3 \C3-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\C3-O1_ ,\C3-QD_ );
P_MUX2 \I5(I8(I2_C3-FRAG_LN  (VCC,GND,\count[10] ,GND,VCC,\C3-O1_ );
P_BUF \C3-FRAG_FB  (\C3-FI_ ,\count[12]_LRBUF3 );
P_AND6 \C3-FRAG_LF  (\count[12] ,GND,VCC,GND,VCC,GND,\C3-FI_ );
P_MUX2 \B3-FRAG_LOS  (VCC,GND,\B3-AI_ ,GND,VCC,\B3-OC_ );
P_BUF \B3-FRAG_AB  (\B3-AI_ ,\count[14]_LRBUF19 );
P_AND6 \B3-FRAG_LA  (\count[14] ,GND,VCC,GND,VCC,GND,\B3-AI_ );
P_FF \I6(I7(I2_G2-FRAG_LQ2  (\G2-Q2D_ ,\G2-QCI_ ,GND,GND,\count_reg[29] );
P_MUX2 \I6(I7(I2_G2-FRAG_LPS  (\G2-O1_ ,GND,\count[29] ,GND,VCC,\G2-Q2D_ );
P_FF \I6(I7(I2_G2-FRAG_LQ  (\G2-QD_ ,\G2-QCI_ ,GND,GND,\count_reg[28] );
P_BUF \I6(I7(I2_G2-FRAG_LQC  (clk,\G2-QCI_ );
P_MUX3 \G2-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\G2-O1_ ,\G2-QD_ );
P_MUX2 \I6(I7(I2_G2-FRAG_LN  (VCC,GND,\count[28] ,GND,VCC,\G2-O1_ );
P_FF \I6(I8(I2_E2-FRAG_LQ2  (\E2-Q2D_ ,\E2-QCI_ ,GND,GND,\count_reg[27] );
P_MUX2 \I6(I8(I2_E2-FRAG_LPS  (\E2-O1_ ,GND,\count[27] ,GND,VCC,\E2-Q2D_ );
P_FF \I6(I8(I2_E2-FRAG_LQ  (\E2-QD_ ,\E2-QCI_ ,GND,GND,\count_reg[26] );
P_BUF \I6(I8(I2_E2-FRAG_LQC  (clk,\E2-QCI_ );
P_MUX3 \E2-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\E2-O1_ ,\E2-QD_ );
P_MUX2 \I6(I8(I2_E2-FRAG_LN  (VCC,GND,\count[26] ,GND,VCC,\E2-O1_ );
P_FF \I5(I9(I2_D2-FRAG_LQ2  (\D2-Q2D_ ,\D2-QCI_ ,GND,GND,\count_reg[9] );
P_MUX2 \I5(I9(I2_D2-FRAG_LPS  (\D2-O1_ ,GND,\count[9]_LRBUF18 ,GND,VCC,
   \D2-Q2D_ );
P_FF \I5(I9(I2_D2-FRAG_LQ  (\D2-QD_ ,\D2-QCI_ ,GND,GND,\count_reg[8] );
P_BUF \I5(I9(I2_D2-FRAG_LQC  (clk,\D2-QCI_ );
P_MUX3 \D2-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\D2-O1_ ,\D2-QD_ );
P_MUX2 \I5(I9(I2_D2-FRAG_LN  (VCC,GND,\count[8] ,GND,VCC,\D2-O1_ );
P_BUF \clear_buf1_D2-FRAG_FB  (\D2-FI_ ,clear_buf1);
P_AND6 \clear_buf1_D2-FRAG_LF  (clear,GND,VCC,GND,VCC,GND,\D2-FI_ );
P_FF \I5(I7(I2_C2-FRAG_LQ2  (\C2-Q2D_ ,\C2-QCI_ ,GND,GND,\count_reg[13] );
P_MUX2 \I5(I7(I2_C2-FRAG_LPS  (\C2-O1_ ,GND,\count[13]_LRBUF2 ,GND,VCC,
   \C2-Q2D_ );
P_FF \I5(I7(I2_C2-FRAG_LQ  (\C2-QD_ ,\C2-QCI_ ,GND,GND,\count_reg[12] );
P_BUF \I5(I7(I2_C2-FRAG_LQC  (clk,\C2-QCI_ );
P_MUX3 \C2-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\C2-O1_ ,\C2-QD_ );
P_MUX2 \I5(I7(I2_C2-FRAG_LN  (VCC,GND,\count[12]_LRBUF3 ,GND,VCC,\C2-O1_ );
P_BUF \C2-FRAG_AB  (\C2-AI_ ,\count[9]_LRBUF18 );
P_AND6 \C2-FRAG_LA  (\count[9]_LRBUF15 ,GND,VCC,GND,VCC,GND,\C2-AI_ );
P_FF \I6(I3(I2_I1-FRAG_LQ2  (\I1-Q2D_ ,\I1-QCI_ ,GND,GND,\count_reg[21] );
P_MUX2 \I6(I3(I2_I1-FRAG_LPS  (\I1-O1_ ,GND,\count[21]_LRBUF16 ,GND,VCC,
   \I1-Q2D_ );
P_FF \I6(I3(I2_I1-FRAG_LQ  (\I1-QD_ ,\I1-QCI_ ,GND,GND,\count_reg[20] );
P_BUF \I6(I3(I2_I1-FRAG_LQC  (clk,\I1-QCI_ );
P_MUX3 \I1-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\I1-O1_ ,\I1-QD_ );
P_MUX2 \I6(I3(I2_I1-FRAG_LN  (VCC,GND,\count[20] ,GND,VCC,\I1-O1_ );
P_FF \I6(I6(I2_G1-FRAG_LQ2  (\G1-Q2D_ ,\G1-QCI_ ,GND,GND,\count_reg[31] );
P_MUX2 \I6(I6(I2_G1-FRAG_LPS  (\G1-O1_ ,GND,\count[31] ,GND,VCC,\G1-Q2D_ );
P_FF \I6(I6(I2_G1-FRAG_LQ  (\G1-QD_ ,\G1-QCI_ ,GND,GND,\count_reg[30] );
P_BUF \I6(I6(I2_G1-FRAG_LQC  (clk,\G1-QCI_ );
P_MUX3 \G1-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\G1-O1_ ,\G1-QD_ );
P_MUX2 \I6(I6(I2_G1-FRAG_LN  (VCC,GND,\count[30] ,GND,VCC,\G1-O1_ );
P_FF \I6(I9(I2_E1-FRAG_LQ2  (\E1-Q2D_ ,\E1-QCI_ ,GND,GND,\count_reg[25] );
P_MUX2 \I6(I9(I2_E1-FRAG_LPS  (\E1-O1_ ,GND,\count[25]_LRBUF9 ,GND,VCC,
   \E1-Q2D_ );
P_FF \I6(I9(I2_E1-FRAG_LQ  (\E1-QD_ ,\E1-QCI_ ,GND,GND,\count_reg[24] );
P_BUF \I6(I9(I2_E1-FRAG_LQC  (clk,\E1-QCI_ );
P_MUX3 \E1-FRAG_LO  (VCC,GND,VCC,GND,VCC,VCC,\E1-O1_ ,\E1-QD_ );
P_MUX2 \I6(I9(I2_E1-FRAG_LN  (VCC,GND,\count[24] ,GND,VCC,\E1-O1_ );
endmodule