example_en_8bit_a.atr

VHDL examples for counter design, use QuickLogic eclips

I Place .I6.I3.I2 A21
I Fixed .I6.I3.I2 NO
I Place .I6.I4.I2 A19
I Fixed .I6.I4.I2 NO
I Place .I6.I5.I2 A25
I Fixed .I6.I5.I2 NO
I Place .I6.I6.I2 A27
I Fixed .I6.I6.I2 NO
I Place .I8.I1 193
I Fixed .I8.I1 NO
I Place .I8.I2 197
I Fixed .I8.I2 NO
I Place .I8.I3 199
I Fixed .I8.I3 NO
I Place .I8.I4 200
I Fixed .I8.I4 NO
I Place .I8.I5 186
I Fixed .I8.I5 NO
I Place .I8.I6 185
I Fixed .I8.I6 NO
I Place .I8.I7 190
I Fixed .I8.I7 NO
I Place .I8.I8 187
I Fixed .I8.I8 NO
I Place .I11 30
I Fixed .I11 NO