key.map.qmsg

键盘接口电路的一个工程---包括vhdl源程序和编译后产生的相关文件

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clk_gen clk_gen:inst1 " "Info: Elaborating entity \"clk_gen\" for hierarchy \"clk_gen:inst1\"" {  } { { "key.bdf" "inst1" { Schematic "D:/altera/70/quartus/work/键盘接口电路/key/key.bdf" { { 64 168 280 160 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "keyscan keyscan:inst " "Info: Elaborating entity \"keyscan\" for hierarchy \"keyscan:inst\"" {  } { { "key.bdf" "inst" { Schematic "D:/altera/70/quartus/work/键盘接口电路/key/key.bdf" { { 64 304 464 160 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "keydecoder_deb:inst2\|q1 High " "Info: Power-up level of register \"keydecoder_deb:inst2\|q1\" is not specified -- using power-up level of High to minimize register" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "keydecoder_deb:inst2\|q1 data_in VCC " "Warning: Reduced register \"keydecoder_deb:inst2\|q1\" with stuck data_in port to stuck value VCC" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "keydecoder_deb:inst2\|q5 High " "Info: Power-up level of register \"keydecoder_deb:inst2\|q5\" is not specified -- using power-up level of High to minimize register" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "keydecoder_deb:inst2\|q5 data_in VCC " "Warning: Reduced register \"keydecoder_deb:inst2\|q5\" with stuck data_in port to stuck value VCC" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "keydecoder_deb:inst2\|q2 High " "Info: Power-up level of register \"keydecoder_deb:inst2\|q2\" is not specified -- using power-up level of High to minimize register" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "keydecoder_deb:inst2\|q2 data_in VCC " "Warning: Reduced register \"keydecoder_deb:inst2\|q2\" with stuck data_in port to stuck value VCC" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "keydecoder_deb:inst2\|q6 High " "Info: Power-up level of register \"keydecoder_deb:inst2\|q6\" is not specified -- using power-up level of High to minimize register" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "keydecoder_deb:inst2\|q6 data_in VCC " "Warning: Reduced register \"keydecoder_deb:inst2\|q6\" with stuck data_in port to stuck value VCC" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "keydecoder_deb:inst2\|q3 High " "Info: Power-up level of register \"keydecoder_deb:inst2\|q3\" is not specified -- using power-up level of High to minimize register" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "keydecoder_deb:inst2\|q3 data_in VCC " "Warning: Reduced register \"keydecoder_deb:inst2\|q3\" with stuck data_in port to stuck value VCC" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "keydecoder_deb:inst2\|q4 High " "Info: Power-up level of register \"keydecoder_deb:inst2\|q4\" is not specified -- using power-up level of High to minimize register" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "keydecoder_deb:inst2\|q4 data_in VCC " "Warning: Reduced register \"keydecoder_deb:inst2\|q4\" with stuck data_in port to stuck value VCC" {  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 18 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "keydecoder_deb:inst2\|functionkey " "Warning: Latch keydecoder_deb:inst2\|functionkey has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA keyscan:inst\|keydrv\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal keyscan:inst\|keydrv\[1\]" {  } { { "../keyscan/keyscan.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keyscan/keyscan.vhd" 17 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 12 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "keydecoder_deb:inst2\|keyvalue\[3\] " "Warning: Latch keydecoder_deb:inst2\|keyvalue\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA keyscan:inst\|keydrv\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal keyscan:inst\|keydrv\[0\]" {  } { { "../keyscan/keyscan.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keyscan/keyscan.vhd" 17 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "keydecoder_deb:inst2\|keyvalue\[2\] " "Warning: Latch keydecoder_deb:inst2\|keyvalue\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA keyscan:inst\|keydrv\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal keyscan:inst\|keydrv\[2\]" {  } { { "../keyscan/keyscan.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keyscan/keyscan.vhd" 17 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "keydecoder_deb:inst2\|keyvalue\[1\] " "Warning: Latch keydecoder_deb:inst2\|keyvalue\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA keyin\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal keyin\[0\]" {  } { { "key.bdf" "" { Schematic "D:/altera/70/quartus/work/键盘接口电路/key/key.bdf" { { 24 304 472 40 "keyin\[3..0\]" "" } } } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "keydecoder_deb:inst2\|keyvalue\[0\] " "Warning: Latch keydecoder_deb:inst2\|keyvalue\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA keyscan:inst\|keydrv\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal keyscan:inst\|keydrv\[1\]" {  } { { "../keyscan/keyscan.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keyscan/keyscan.vhd" 17 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "../keydecoder_deb/keydecoder_deb.vhd" "" { Text "D:/altera/70/quartus/work/键盘接口电路/keydecoder_deb/keydecoder_deb.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "keypressed GND " "Warning: Pin \"keypressed\" stuck at GND" {  } { { "key.bdf" "" { Schematic "D:/altera/70/quartus/work/键盘接口电路/key/key.bdf" { { 88 800 976 104 "keypressed" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "57 " "Info: Implemented 57 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "5 " "Info: Implemented 5 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "6 " "Info: Implemented 6 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "46 " "Info: Implemented 46 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 27 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 27 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "140 " "Info: Allocated 140 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Jun 27 15:53:28 2008 " "Info: Processing ended: Fri Jun 27 15:53:28 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}