ps2_keyboard_interface.qsf

本实验实现PS/2接口与RS-232接口的数据传输

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ps2_keyboard_interface_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:35:01  JUNE 05, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name VERILOG_FILE ../src/ref2/div_4.v
set_global_assignment -name VERILOG_FILE ../src/ref2/rcvr.v
set_global_assignment -name VERILOG_FILE ../src/ref2/txmit.v
set_global_assignment -name VERILOG_FILE ../src/ref2/uart.v
set_global_assignment -name VERILOG_FILE ../src/ref2/uart_if.v
set_global_assignment -name VERILOG_FILE div_256.v
set_global_assignment -name BDF_FILE ps2_keyboard.bdf
set_global_assignment -name VERILOG_FILE ../Src/ref2/ps2_keyboard.v
set_global_assignment -name VERILOG_FILE data_buf.v

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_153 -to mclk
set_location_assignment PIN_131 -to reset
set_location_assignment PIN_240 -to ps2_clk
set_location_assignment PIN_1 -to ps2_data
set_location_assignment PIN_12 -to rx_ascii[0]
set_location_assignment PIN_11 -to rx_ascii[1]
set_location_assignment PIN_8 -to rx_ascii[2]
set_location_assignment PIN_7 -to rx_ascii[3]
set_location_assignment PIN_236 -to txd

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE PQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY ps2_keyboard
set_global_assignment -name USER_LIBRARIES "f:\\i2c_altera/"

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION ON
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1

# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP On
set_global_assignment -name USE_SIGNALTAP_FILE "D:\\RedLogic\\RMC_samples_EP1C20\\s9_PS2_ref\\Proj\\stp1.stp"

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF