time_sim.v

实用的程序代码

// Xilinx Verilog produced by program ngd2ver, Version M1.4.12
// Date: Tue Jan  6 18:30:01 1998
// Design file: time_sim.nga
// Device: 4005epc84-2
`timescale 1 ns/1 ps
`uselib dir=/home/zeppelin2/tech_apps/m1_4.12/verilog/data libext=.vmd

  module mux_gate16 (SIG, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, SEL);
    output SIG;
    input A;
    input B;
    input C;
    input D;
    input E;
    input F;
    input G;
    input H;
    input I;
    input J;
    input K;
    input L;
    input M;
    input N;
    input O;
    input P;
    input [3:0] SEL;

    wire n141, n142, n143, n144, n276, n146, n147, n148, n149, n150, n151, n152
    , n153, n154, n155, n156, n157, n158, n159, n160, n161, n237, n238, n239, 
    n213, n240, n242, n241, n212, n243, n244, n245, n210, n246, n248, n247, n209
    , n249, n258, n251, n259, n250, n254, n253, n252, n214, n257, n256, n255, 
    n211, n266, n267, n260, n261, n262, n263, n265, n264, n275, n274, n268, n270
    , n269, n271, n272, n273, \U108/$1I20_GTS_TRI , \U128/2_0 , \U132/2_0 , 
    \U136/2_0 , \U140/2_0 , \U147/2_0 , \U151/2_0 , \U153/2_0 , \U157/2_0 , 
    \U161/2_0 , \U162/2_0 , \U166/2_0 , \U170/2_0 , U126_2_INV, U127_2_INV, 
    U130_2_INV, U134_2_INV, U135_2_INV, U138_2_INV, U142_2_INV, U144_2_INV, 
    U148_2_INV, U152_2_INV, U155_2_INV, U156_2_INV, U159_2_INV, U164_2_INV, 
    U168_2_INV, U169_2_INV, \U128/n213_2_INV , \U136/n210_2_INV , 
    \U153/n214_2_INV , \U157/n267_2_INV , \U162/n211_2_INV , \U170/n274_2_INV , 
    \U108/$1I20_GTS_TRI_2_INV ;
    `ifdef GTS_SIGNAL
      wire GTS = `GTS_SIGNAL ;
    `else
      wire GTS ;
    `endif
    initial $sdf_annotate("time_sim.sdf");

    X_BUF U104 (.IN (SEL[3]), .OUT (n141));
    X_BUF U105 (.IN (SEL[2]), .OUT (n142));
    X_BUF U106 (.IN (SEL[1]), .OUT (n143));
    X_BUF U107 (.IN (SEL[0]), .OUT (n144));
    X_BUF U109 (.IN (A), .OUT (n146));
    X_BUF U110 (.IN (B), .OUT (n147));
    X_BUF U111 (.IN (C), .OUT (n148));
    X_BUF U112 (.IN (D), .OUT (n149));
    X_BUF U113 (.IN (E), .OUT (n150));
    X_BUF U114 (.IN (F), .OUT (n151));
    X_BUF U115 (.IN (G), .OUT (n152));
    X_BUF U116 (.IN (H), .OUT (n153));
    X_BUF U117 (.IN (I), .OUT (n154));
    X_BUF U118 (.IN (J), .OUT (n155));
    X_BUF U119 (.IN (K), .OUT (n156));
    X_BUF U120 (.IN (L), .OUT (n157));
    X_BUF U121 (.IN (M), .OUT (n158));
    X_BUF U122 (.IN (N), .OUT (n159));
    X_BUF U123 (.IN (O), .OUT (n160));
    X_BUF U124 (.IN (P), .OUT (n161));
    X_INV U125 (.IN (n144), .OUT (n237));
    X_OR2 U126 (.IN0 (n237), .IN1 (n159), .OUT (U126_2_INV));
    X_OR2 U127 (.IN0 (n158), .IN1 (n144), .OUT (U127_2_INV));
    X_INV U129 (.IN (n161), .OUT (n240));
    X_AND2 U130 (.IN0 (n144), .IN1 (n240), .OUT (U130_2_INV));
    X_OR2 U131 (.IN0 (n160), .IN1 (n144), .OUT (n241));
    X_INV U133 (.IN (n144), .OUT (n243));
    X_OR2 U134 (.IN0 (n243), .IN1 (n151), .OUT (U134_2_INV));
    X_OR2 U135 (.IN0 (n150), .IN1 (n144), .OUT (U135_2_INV));
    X_INV U137 (.IN (n153), .OUT (n246));
    X_AND2 U138 (.IN0 (n144), .IN1 (n246), .OUT (U138_2_INV));
    X_OR2 U139 (.IN0 (n152), .IN1 (n144), .OUT (n247));
    X_INV U141 (.IN (n258), .OUT (n249));
    X_AND2 U142 (.IN0 (n141), .IN1 (n259), .OUT (U142_2_INV));
    X_OR2 U143 (.IN0 (n141), .IN1 (n249), .OUT (n250));
    X_AND2 U144 (.IN0 (n250), .IN1 (n251), .OUT (U144_2_INV));
    X_INV U145 (.IN (n253), .OUT (n254));
    X_INV U146 (.IN (n142), .OUT (n252));
    X_OR2 U148 (.IN0 (n254), .IN1 (n214), .OUT (U148_2_INV));
    X_INV U149 (.IN (n256), .OUT (n257));
    X_INV U150 (.IN (n142), .OUT (n255));
    X_OR2 U152 (.IN0 (n257), .IN1 (n211), .OUT (U152_2_INV));
    X_INV U154 (.IN (n144), .OUT (n260));
    X_OR2 U155 (.IN0 (n260), .IN1 (n155), .OUT (U155_2_INV));
    X_OR2 U156 (.IN0 (n154), .IN1 (n144), .OUT (U156_2_INV));
    X_INV U158 (.IN (n157), .OUT (n263));
    X_AND2 U159 (.IN0 (n144), .IN1 (n263), .OUT (U159_2_INV));
    X_OR2 U160 (.IN0 (n156), .IN1 (n144), .OUT (n264));
    X_INV U163 (.IN (n149), .OUT (n268));
    X_AND2 U164 (.IN0 (n144), .IN1 (n268), .OUT (U164_2_INV));
    X_OR2 U165 (.IN0 (n148), .IN1 (n144), .OUT (n269));
    X_INV U167 (.IN (n144), .OUT (n271));
    X_OR2 U168 (.IN0 (n271), .IN1 (n147), .OUT (U168_2_INV));
    X_OR2 U169 (.IN0 (n146), .IN1 (n144), .OUT (U169_2_INV));
    X_IPAD \SEL<3>_PAD  (.PAD (SEL[3]));
    X_IPAD \SEL<2>_PAD  (.PAD (SEL[2]));
    X_IPAD \SEL<1>_PAD  (.PAD (SEL[1]));
    X_IPAD \SEL<0>_PAD  (.PAD (SEL[0]));
    X_OPAD SIG_PAD (.PAD (SIG));
    X_IPAD A_PAD (.PAD (A));
    X_IPAD B_PAD (.PAD (B));
    X_IPAD C_PAD (.PAD (C));
    X_IPAD D_PAD (.PAD (D));
    X_IPAD E_PAD (.PAD (E));
    X_IPAD F_PAD (.PAD (F));
    X_IPAD G_PAD (.PAD (G));
    X_IPAD H_PAD (.PAD (H));
    X_IPAD I_PAD (.PAD (I));
    X_IPAD J_PAD (.PAD (J));
    X_IPAD K_PAD (.PAD (K));
    X_IPAD L_PAD (.PAD (L));
    X_IPAD M_PAD (.PAD (M));
    X_IPAD N_PAD (.PAD (N));
    X_IPAD O_PAD (.PAD (O));
    X_IPAD P_PAD (.PAD (P));
    X_BUF \U108/$1I20  (.IN (n276), .OUT (\U108/$1I20_GTS_TRI ));
    X_TRI \U108/$1I20_GTS_TRI_127  (.IN (\U108/$1I20_GTS_TRI ), .OUT (SIG), 
    .CTL (\U108/$1I20_GTS_TRI_2_INV ));
    X_OR2 \U128/n213/2_0  (.IN0 (n143), .IN1 (n239), .OUT (\U128/2_0 ));
    X_OR2 \U128/n213  (.IN0 (\U128/2_0 ), .IN1 (n238), .OUT (\U128/n213_2_INV )
    );
    X_AND2 \U132/n212/2_0  (.IN0 (n242), .IN1 (n241), .OUT (\U132/2_0 ));
    X_AND2 \U132/n212  (.IN0 (\U132/2_0 ), .IN1 (n143), .OUT (n212));
    X_OR2 \U136/n210/2_0  (.IN0 (n143), .IN1 (n245), .OUT (\U136/2_0 ));
    X_OR2 \U136/n210  (.IN0 (\U136/2_0 ), .IN1 (n244), .OUT (\U136/n210_2_INV )
    );
    X_AND2 \U140/n209/2_0  (.IN0 (n248), .IN1 (n247), .OUT (\U140/2_0 ));
    X_AND2 \U140/n209  (.IN0 (\U140/2_0 ), .IN1 (n143), .OUT (n209));
    X_OR2 \U147/n253/2_0  (.IN0 (n252), .IN1 (n212), .OUT (\U147/2_0 ));
    X_OR2 \U147/n253  (.IN0 (\U147/2_0 ), .IN1 (n213), .OUT (n253));
    X_OR2 \U151/n256/2_0  (.IN0 (n255), .IN1 (n209), .OUT (\U151/2_0 ));
    X_OR2 \U151/n256  (.IN0 (\U151/2_0 ), .IN1 (n210), .OUT (n256));
    X_OR2 \U153/n214/2_0  (.IN0 (n267), .IN1 (n142), .OUT (\U153/2_0 ));
    X_OR2 \U153/n214  (.IN0 (\U153/2_0 ), .IN1 (n266), .OUT (\U153/n214_2_INV )
    );
    X_OR2 \U157/n267/2_0  (.IN0 (n143), .IN1 (n262), .OUT (\U157/2_0 ));
    X_OR2 \U157/n267  (.IN0 (\U157/2_0 ), .IN1 (n261), .OUT (\U157/n267_2_INV )
    );
    X_AND2 \U161/n266/2_0  (.IN0 (n265), .IN1 (n264), .OUT (\U161/2_0 ));
    X_AND2 \U161/n266  (.IN0 (\U161/2_0 ), .IN1 (n143), .OUT (n266));
    X_OR2 \U162/n211/2_0  (.IN0 (n274), .IN1 (n142), .OUT (\U162/2_0 ));
    X_OR2 \U162/n211  (.IN0 (\U162/2_0 ), .IN1 (n275), .OUT (\U162/n211_2_INV )
    );
    X_AND2 \U166/n275/2_0  (.IN0 (n270), .IN1 (n269), .OUT (\U166/2_0 ));
    X_AND2 \U166/n275  (.IN0 (\U166/2_0 ), .IN1 (n143), .OUT (n275));
    X_OR2 \U170/n274/2_0  (.IN0 (n143), .IN1 (n273), .OUT (\U170/2_0 ));
    X_OR2 \U170/n274  (.IN0 (\U170/2_0 ), .IN1 (n272), .OUT (\U170/n274_2_INV )
    );
    X_INV U126_2_INV_128 (.IN (U126_2_INV), .OUT (n238));
    X_INV U127_2_INV_129 (.IN (U127_2_INV), .OUT (n239));
    X_INV U130_2_INV_130 (.IN (U130_2_INV), .OUT (n242));
    X_INV U134_2_INV_131 (.IN (U134_2_INV), .OUT (n244));
    X_INV U135_2_INV_132 (.IN (U135_2_INV), .OUT (n245));
    X_INV U138_2_INV_133 (.IN (U138_2_INV), .OUT (n248));
    X_INV U142_2_INV_134 (.IN (U142_2_INV), .OUT (n251));
    X_INV U144_2_INV_135 (.IN (U144_2_INV), .OUT (n276));
    X_INV U148_2_INV_136 (.IN (U148_2_INV), .OUT (n259));
    X_INV U152_2_INV_137 (.IN (U152_2_INV), .OUT (n258));
    X_INV U155_2_INV_138 (.IN (U155_2_INV), .OUT (n261));
    X_INV U156_2_INV_139 (.IN (U156_2_INV), .OUT (n262));
    X_INV U159_2_INV_140 (.IN (U159_2_INV), .OUT (n265));
    X_INV U164_2_INV_141 (.IN (U164_2_INV), .OUT (n270));
    X_INV U168_2_INV_142 (.IN (U168_2_INV), .OUT (n272));
    X_INV U169_2_INV_143 (.IN (U169_2_INV), .OUT (n273));
    X_INV \U128/n213_2_INV_144  (.IN (\U128/n213_2_INV ), .OUT (n213));
    X_INV \U136/n210_2_INV_145  (.IN (\U136/n210_2_INV ), .OUT (n210));
    X_INV \U153/n214_2_INV_146  (.IN (\U153/n214_2_INV ), .OUT (n214));
    X_INV \U157/n267_2_INV_147  (.IN (\U157/n267_2_INV ), .OUT (n267));
    X_INV \U162/n211_2_INV_148  (.IN (\U162/n211_2_INV ), .OUT (n211));
    X_INV \U170/n274_2_INV_149  (.IN (\U170/n274_2_INV ), .OUT (n274));
    X_INV \U108/$1I20_GTS_TRI_2_INV_150  (.IN (GTS), .OUT 
    (\U108/$1I20_GTS_TRI_2_INV ));
    X_PD NGD2VER_PD_123 (.OUT (GTS) );
  endmodule