time_sim.sdf

实用的程序代码

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "nested_if")
  (DATE "Tue Jan  6 18:19:10 1998")
  (VENDOR "Xilinx")
  (PROGRAM "Xilinx VERILOG SDF writer")
  (VERSION "M1.4.12")
  (DIVIDER /)
  (VOLTAGE 5.00:5.00:5.00)
  (PROCESS)
  (TEMPERATURE 25.00:25.00:25.00)
  (TIMESCALE 1ps)
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    (INSTANCE U122)
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      (ABSOLUTE
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    (CELLTYPE "X_OR2")
    (INSTANCE U139)
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      (ABSOLUTE
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        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
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      (ABSOLUTE
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        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
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    (INSTANCE U141)
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      (ABSOLUTE
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    (INSTANCE U142)
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      (ABSOLUTE
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      )
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    (INSTANCE U143)
    (DELAY
      (ABSOLUTE
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        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
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      (ABSOLUTE
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        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))
        (PORT IN1  (2311:2311:2311) (2311:2311:2311))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
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    (CELLTYPE "X_INV")
    (INSTANCE U145)
    (DELAY
      (ABSOLUTE
        (PORT IN  (1398:1398:1398) (1398:1398:1398))
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      )
    )
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    (CELLTYPE "X_INV")
    (INSTANCE U146)
    (DELAY
      (ABSOLUTE
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      )
    )
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  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U148)
    (DELAY
      (ABSOLUTE
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    )
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    (CELLTYPE "X_INV")
    (INSTANCE U150)
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      (ABSOLUTE
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      (ABSOLUTE
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      (ABSOLUTE
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    (CELLTYPE "X_OR2")
    (INSTANCE U153)
    (DELAY
      (ABSOLUTE
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        (IOPATH IN1 OUT  (1130:1130:1130) (1130:1130:1130))
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    (INSTANCE U154)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
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        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U155)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1510:1510:1510) (1510:1510:1510))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1991:1991:1991) (1991:1991:1991))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U156)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
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        (PORT IN1  (1197:1197:1197) (1197:1197:1197))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U157)
    (DELAY
      (ABSOLUTE
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        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))
        (PORT IN1  (1053:1053:1053) (1053:1053:1053))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
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    (INSTANCE DEC_Q_reg\<5\>\/\$1I11\/FF)
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      (ABSOLUTE
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        (PORT CLK  (1194:1194:1194) (1194:1194:1194))
        (IOPATH CLK OUT  (7030:7030:7030) (7030:7030:7030))
        (IOPATH SET OUT  (7030:7030:7030) (7030:7030:7030))
        (PORT RST  (1970:1970:1970) (1970:1970:1970))
        (IOPATH RST OUT  (7030:7030:7030) (7030:7030:7030))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))
      (WIDTH (negedge CLK)  (4000:4000:4000))
      (SETUP IN (posedge CLK) (0:0:0))
      (HOLD CE (posedge CLK) (500:500:500))
      (HOLD IN (posedge CLK) (0:0:0))
    )
  )
  (CELL
    (CELLTYPE "X_BUF")
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      (ABSOLUTE
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        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_TRI")
    (INSTANCE DEC_Q_reg\<5\>\/\$1I11\/OBUF_GTS_TRI_102)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
        (IOPATH CTL OUT ( )  ( )  (0:0:0) (0:0:0) (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_FF")
    (INSTANCE DEC_Q_reg\<4\>\/\$1I11\/FF)
    (DELAY
      (ABSOLUTE
        (PORT IN  (5629:5629:5629) (5629:5629:5629))
        (PORT CLK  (1213:1213:1213) (1213:1213:1213))
        (IOPATH CLK OUT  (7030:7030:7030) (7030:7030:7030))
        (IOPATH SET OUT  (7030:7030:7030) (7030:7030:7030))
        (PORT RST  (1970:1970:1970) (1970:1970:1970))
        (IOPATH RST OUT  (7030:7030:7030) (7030:7030:7030))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))