time_sim.sdf

实用的程序代码

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "case_ex")
  (DATE "Tue Jan  6 19:30:57 1998")
  (VENDOR "Xilinx")
  (PROGRAM "Xilinx VERILOG SDF writer")
  (VERSION "M1.4.12")
  (DIVIDER /)
  (VOLTAGE 5.00:5.00:5.00)
  (PROCESS)
  (TEMPERATURE 25.00:25.00:25.00)
  (TIMESCALE 1ps)
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)