time_sim.vhd

实用的程序代码

-- Xilinx VHDL produced by program ngd2vhdl, Version M1.4.12
-- Date: Tue Jan  6 17:53:40 1998
-- Design file: time_sim.nga
-- Device: 4005epc84-2
----- CELL TOC -----
-- Model for  Tristate-On-Configuration Cell
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.VITAL_Timing.all;

entity TOC is
    generic ( InstancePath: STRING := "*");
    port( O : out std_ulogic := '0' ) ;
    attribute VITAL_LEVEL0 of TOC : entity is TRUE ;
end TOC ;

architecture TOC_V of TOC is
attribute VITAL_LEVEL0 of TOC_V : architecture is TRUE ;
begin
    ONE_SHOT: process
    begin
      wait;
    end process ONE_SHOT ;
end TOC_V ;

configuration CFG_TOC_V of TOC is
    for TOC_V
    end for ;
end CFG_TOC_V ;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library SIMPRIM;
use SIMPRIM.VCOMPONENTS.ALL;
use SIMPRIM.VPACKAGE.ALL;
entity BARREL is
  port (
    S : in  STD_LOGIC_VECTOR ( 3 downto 0 );
    A_P : in  STD_LOGIC_VECTOR ( 15 downto 0 );
    B_P : out  STD_LOGIC_VECTOR ( 15 downto 0 )
  ) ;
end BARREL ;

architecture STRUCTURE of BARREL is
  component TOC
       port ( O : out STD_ULOGIC ) ;
  end component ;
  signal N86 , N87 , N88 , N89 , N90 , N91 , N92 , N93 , N94 , N95 , N96 , N97 
  , N98 , N99 , N100 , N101 , N102 , N103 , N104 , N105 , N560 , N561 , N562 , 
  N563 , N564 , N565 , N566 , N567 , N568 , N569 , N570 , N571 , N572 , N573 , 
  N574 , N575 , N300 , N301 , N294 , N232 , N296 , N233 , N295 , N297 , N230 , 
  N298 , N231 , N299 , N308 , N309 , N302 , N240 , N303 , N241 , N304 , N305 , 
  N238 , N307 , N239 , N306 , N316 , N317 , N310 , N236 , N311 , N237 , N312 , 
  N313 , N234 , N315 , N235 , N314 , N325 , N326 , N318 , N320 , N319 , N322 , 
  N321 , N324 , N323 , N334 , N335 , N327 , N228 , N329 , N229 , N328 , N331 , 
  N330 , N333 , N227 , N332 , N226 , N343 , N344 , N336 , N338 , N337 , N340 , 
  N339 , N342 , N341 , N352 , N353 , N345 , N347 , N346 , N349 , N348 , N351 , 
  N350 , N360 , N361 , N354 , N356 , N355 , N357 , N358 , N359 , N368 , N369 , 
  N362 , N364 , N363 , N365 , N366 , N367 , N377 , N376 , N370 , N371 , N372 , 
  N373 , N375 , N374 , N386 , N385 , N378 , N380 , N379 , N382 , N381 , N384 , 
  N383 , N394 , N395 , N388 , N387 , N390 , N389 , N391 , N393 , N392 , N403 , 
  N404 , N397 , N396 , N399 , N398 , N400 , N402 , N401 , N412 , N411 , N405 , 
  N406 , N407 , N408 , N410 , N409 , N419 , N420 , N413 , N414 , N415 , N416 , 
  N418 , N417 , N428 , N427 , N421 , N423 , N422 , N424 , N425 , N426 , N435 , 
  N436 , N429 , N430 , N431 , N432 , N434 , N433 , N444 , N445 , N438 , N437 , 
  N440 , N439 , N441 , N443 , N442 , N454 , N453 , N446 , N448 , N447 , N449 , 
  N450 , N452 , N451 , N462 , N461 , N455 , N457 , N456 , N458 , N459 , N460 , 
  N470 , N469 , N463 , N465 , N464 , N466 , N467 , N468 , N477 , N478 , N471 , 
  N472 , N473 , N474 , N476 , N475 , N485 , N486 , N479 , N480 , N481 , N482 , 
  N484 , N483 , N494 , N493 , N487 , N489 , N488 , N490 , N491 , N492 , N501 , 
  N502 , N495 , N496 , N497 , N498 , N500 , N499 , N510 , N509 , N503 , N505 , 
  N504 , N506 , N507 , N508 , N517 , N518 , N511 , N512 , N513 , N514 , N516 , 
  N515 , N526 , N525 , N519 , N521 , N520 , N522 , N523 , N524 , N534 , N535 , 
  N527 , N529 , N528 , N530 , N531 , N533 , N532 , N542 , N543 , N536 , N537 , 
  N538 , N539 , N541 , N540 , N550 , N551 , N544 , N545 , N546 , N547 , N549 , 
  N548 , N559 , N558 , N552 , N554 , N553 , N555 , N556 , N557 , 
  U238_1I20_GTS_TRI , U239_1I20_GTS_TRI , U240_1I20_GTS_TRI , U241_1I20_GTS_TRI 
  , U242_1I20_GTS_TRI , U243_1I20_GTS_TRI , U244_1I20_GTS_TRI , 
  U245_1I20_GTS_TRI , U246_1I20_GTS_TRI , U247_1I20_GTS_TRI , U248_1I20_GTS_TRI 
  , U249_1I20_GTS_TRI , U250_1I20_GTS_TRI , U251_1I20_GTS_TRI , 
  U252_1I20_GTS_TRI , U253_1I20_GTS_TRI , U258_2_0 , U262_2_0 , U267_2_0 , 
  U271_2_0 , U276_2_0 , U280_2_0 , U283_2_0 , U284_2_0 , U288_2_0 , U289_2_0 , 
  U293_2_0 , U294_2_0 , U298_2_0 , U299_2_0 , U303_2_0 , U304_2_0 , U308_2_0 , 
  U309_2_0 , U313_2_0 , U314_2_0 , U318_2_0 , U319_2_0 , U325_2_0 , U329_2_0 , 
  U334_2_0 , U338_2_0 , U343_2_0 , U347_2_0 , U350_2_0 , U351_2_0 , U355_2_0 , 
  U356_2_0 , U361_2_0 , U362_2_0 , U365_2_0 , U366_2_0 , U371_2_0 , U372_2_0 , 
  U375_2_0 , U376_2_0 , U382_2_0 , U386_2_0 , U391_2_0 , U395_2_0 , U400_2_0 , 
  U404_2_0 , U409_2_0 , U413_2_0 , U417_2_0 , U418_2_0 , U421_2_0 , U422_2_0 , 
  U426_2_0 , U427_2_0 , U431_2_0 , U432_2_0 , U438_2_0 , U442_2_0 , U447_2_0 , 
  U451_2_0 , U456_2_0 , U460_2_0 , U465_2_0 , U469_2_0 , U474_2_0 , U478_2_0 , 
  U483_2_0 , U487_2_0 , U492_2_0 , U496_2_0 , U501_2_0 , U505_2_0 , U510_2_0 , 
  U514_2_0 , U517_2_0 , U518_2_0 , U522_2_0 , U523_2_0 , U529_2_0 , U533_2_0 , 
  U538_2_0 , U542_2_0 , U547_2_0 , U551_2_0 , U256_2_INV , U261_2_INV , 
  U266_2_INV , U269_2_INV , U275_2_INV , U278_2_INV , U285_2_INV , U290_2_INV , 
  U295_2_INV , U300_2_INV , U305_2_INV , U310_2_INV , U315_2_INV , U320_2_INV , 
  U323_2_INV , U328_2_INV , U332_2_INV , U337_2_INV , U342_2_INV , U345_2_INV , 
  U352_2_INV , U357_2_INV , U363_2_INV , U367_2_INV , U373_2_INV , U377_2_INV , 
  U378_2_INV , U380_2_INV , U381_2_INV , U384_2_INV , U387_2_INV , U389_2_INV , 
  U390_2_INV , U393_2_INV , U396_2_INV , U398_2_INV , U402_2_INV , U403_2_INV , 
  U405_2_INV , U407_2_INV , U408_2_INV , U411_2_INV , U419_2_INV , U423_2_INV , 
  U424_2_INV , U428_2_INV , U433_2_INV , U434_2_INV , U436_2_INV , U440_2_INV , 
  U441_2_INV , U443_2_INV , U445_2_INV , U449_2_INV , U450_2_INV , U452_2_INV , 
  U454_2_INV , U455_2_INV , U458_2_INV , U464_2_INV , U467_2_INV , U470_2_INV , 
  U472_2_INV , U476_2_INV , U477_2_INV , U479_2_INV , U481_2_INV , U482_2_INV , 
  U485_2_INV , U488_2_INV , U490_2_INV , U494_2_INV , U495_2_INV , U497_2_INV , 
  U499_2_INV , U500_2_INV , U503_2_INV , U508_2_INV , U513_2_INV , U515_2_INV , 
  U519_2_INV , U524_2_INV , U525_2_INV , U527_2_INV , U528_2_INV , U531_2_INV , 
  U534_2_INV , U536_2_INV , U537_2_INV , U540_2_INV , U543_2_INV , U545_2_INV , 
  U549_2_INV , U550_2_INV , U262_N300_2_INV , U267_N309_2_INV , U276_N317_2_INV 
  , U284_N319_2_INV , U294_N328_2_INV , U304_N337_2_INV , U314_N346_2_INV , 
  U329_N360_2_INV , U338_N368_2_INV , U343_N377_2_INV , U351_N379_2_INV , 
  U366_N392_2_INV , U376_N401_2_INV , U382_N412_2_INV , U391_N420_2_INV , 
  U404_N427_2_INV , U409_N436_2_INV , U422_N442_2_INV , U427_N447_2_INV , 
  U432_N451_2_INV , U442_N461_2_INV , U451_N469_2_INV , U456_N478_2_INV , 
  U465_N486_2_INV , U478_N493_2_INV , U483_N502_2_INV , U496_N509_2_INV , 
  U501_N518_2_INV , U514_N525_2_INV , U518_N528_2_INV , U523_N532_2_INV , 
  U529_N543_2_INV , U538_N551_2_INV , U551_N558_2_INV , U238_1I20_GTS_TRI_2_INV 
  , U239_1I20_GTS_TRI_2_INV , U240_1I20_GTS_TRI_2_INV , U241_1I20_GTS_TRI_2_INV 
  , U242_1I20_GTS_TRI_2_INV , U243_1I20_GTS_TRI_2_INV , U244_1I20_GTS_TRI_2_INV 
  , U245_1I20_GTS_TRI_2_INV , U246_1I20_GTS_TRI_2_INV , U247_1I20_GTS_TRI_2_INV 
  , U248_1I20_GTS_TRI_2_INV , U249_1I20_GTS_TRI_2_INV , U250_1I20_GTS_TRI_2_INV 
  , U251_1I20_GTS_TRI_2_INV , U252_1I20_GTS_TRI_2_INV , U253_1I20_GTS_TRI_2_INV 
  , GTS : STD_LOGIC ;
  begin
    U218 : X_BUF 
      port map ( I => S(3) , O => N86 ) ;
    U219 : X_BUF 
      port map ( I => S(2) , O => N87 ) ;
    U220 : X_BUF 
      port map ( I => S(1) , O => N88 ) ;
    U221 : X_BUF 
      port map ( I => S(0) , O => N89 ) ;
    U222 : X_BUF 
      port map ( I => A_P(15) , O => N90 ) ;
    U223 : X_BUF 
      port map ( I => A_P(14) , O => N91 ) ;
    U224 : X_BUF 
      port map ( I => A_P(13) , O => N92 ) ;
    U225 : X_BUF 
      port map ( I => A_P(12) , O => N93 ) ;
    U226 : X_BUF 
      port map ( I => A_P(11) , O => N94 ) ;
    U227 : X_BUF 
      port map ( I => A_P(10) , O => N95 ) ;
    U228 : X_BUF 
      port map ( I => A_P(9) , O => N96 ) ;
    U229 : X_BUF 
      port map ( I => A_P(8) , O => N97 ) ;
    U230 : X_BUF 
      port map ( I => A_P(7) , O => N98 ) ;
    U231 : X_BUF 
      port map ( I => A_P(6) , O => N99 ) ;
    U232 : X_BUF 
      port map ( I => A_P(5) , O => N100 ) ;
    U233 : X_BUF 
      port map ( I => A_P(4) , O => N101 ) ;
    U234 : X_BUF 
      port map ( I => A_P(3) , O => N102 ) ;
    U235 : X_BUF 
      port map ( I => A_P(2) , O => N103 ) ;
    U236 : X_BUF 
      port map ( I => A_P(1) , O => N104 ) ;
    U237 : X_BUF 
      port map ( I => A_P(0) , O => N105 ) ;
    U254 : X_OR2 
      port map ( I0 => N300 , I1 => N301 , O => N575 ) ;
    U255 : X_INV 
      port map ( I => N232 , O => N294 ) ;
    U256 : X_AND2 
      port map ( I0 => N87 , I1 => N233 , O => U256_2_INV ) ;
    U257 : X_OR2 
      port map ( I0 => N87 , I1 => N294 , O => N295 ) ;
    U259 : X_INV 
      port map ( I => N230 , O => N297 ) ;
    U260 : X_AND2 
      port map ( I0 => N87 , I1 => N231 , O => N298 ) ;
    U261 : X_OR2 
      port map ( I0 => N87 , I1 => N297 , O => U261_2_INV ) ;
    U263 : X_OR2 
      port map ( I0 => N308 , I1 => N309 , O => N565 ) ;
    U264 : X_INV 
      port map ( I => N240 , O => N302 ) ;
    U265 : X_AND2 
      port map ( I0 => N87 , I1 => N241 , O => N303 ) ;
    U266 : X_OR2 
      port map ( I0 => N87 , I1 => N302 , O => U266_2_INV ) ;
    U268 : X_INV 
      port map ( I => N238 , O => N305 ) ;
    U269 : X_AND2 
      port map ( I0 => N87 , I1 => N239 , O => U269_2_INV ) ;
    U270 : X_OR2 
      port map ( I0 => N87 , I1 => N305 , O => N306 ) ;
    U272 : X_OR2 
      port map ( I0 => N316 , I1 => N317 , O => N564 ) ;
    U273 : X_INV 
      port map ( I => N236 , O => N310 ) ;
    U274 : X_AND2 
      port map ( I0 => N87 , I1 => N237 , O => N311 ) ;
    U275 : X_OR2 
      port map ( I0 => N87 , I1 => N310 , O => U275_2_INV ) ;
    U277 : X_INV 
      port map ( I => N234 , O => N313 ) ;
    U278 : X_AND2 
      port map ( I0 => N87 , I1 => N235 , O => U278_2_INV ) ;
    U279 : X_OR2 
      port map ( I0 => N87 , I1 => N313 , O => N314 ) ;
    U281 : X_OR2 
      port map ( I0 => N325 , I1 => N326 , O => N563 ) ;
    U282 : X_INV 
      port map ( I => N232 , O => N318 ) ;
    U285 : X_AND2 
      port map ( I0 => N319 , I1 => N320 , O => U285_2_INV ) ;
    U286 : X_INV 
      port map ( I => N87 , O => N322 ) ;
    U287 : X_INV 
      port map ( I => N86 , O => N321 ) ;
    U290 : X_AND2 
      port map ( I0 => N323 , I1 => N324 , O => U290_2_INV ) ;
    U291 : X_OR2 
      port map ( I0 => N334 , I1 => N335 , O => N562 ) ;
    U292 : X_INV 
      port map ( I => N228 , O => N327 ) ;
    U295 : X_AND2 
      port map ( I0 => N328 , I1 => N329 , O => U295_2_INV ) ;
    U296 : X_INV 
      port map ( I => N87 , O => N331 ) ;
    U297 : X_INV 
      port map ( I => N86 , O => N330 ) ;
    U300 : X_AND2 
      port map ( I0 => N332 , I1 => N333 , O => U300_2_INV ) ;
    U301 : X_OR2 
      port map ( I0 => N343 , I1 => N344 , O => N561 ) ;
    U302 : X_INV 
      port map ( I => N240 , O => N336 ) ;
    U305 : X_AND2 
      port map ( I0 => N337 , I1 => N338 , O => U305_2_INV ) ;
    U306 : X_INV 
      port map ( I => N87 , O => N340 ) ;
    U307 : X_INV 
      port map ( I => N86 , O => N339 ) ;
    U310 : X_AND2 
      port map ( I0 => N341 , I1 => N342 , O => U310_2_INV ) ;
    U311 : X_OR2 
      port map ( I0 => N352 , I1 => N353 , O => N560 ) ;
    U312 : X_INV 
      port map ( I => N236 , O => N345 ) ;
    U315 : X_AND2 
      port map ( I0 => N346 , I1 => N347 , O => U315_2_INV ) ;
    U316 : X_INV 
      port map ( I => N87 , O => N349 ) ;
    U317 : X_INV 
      port map ( I => N86 , O => N348 ) ;
    U320 : X_AND2 
      port map ( I0 => N350 , I1 => N351 , O => U320_2_INV ) ;
    U321 : X_OR2 
      port map ( I0 => N360 , I1 => N361 , O => N574 ) ;
    U322 : X_INV 
      port map ( I => N228 , O => N354 ) ;
    U323 : X_AND2 
      port map ( I0 => N87 , I1 => N229 , O => U323_2_INV ) ;
    U324 : X_OR2 
      port map ( I0 => N87 , I1 => N354 , O => N355 ) ;
    U326 : X_INV 
      port map ( I => N226 , O => N357 ) ;
    U327 : X_AND2 
      port map ( I0 => N87 , I1 => N227 , O => N358 ) ;
    U328 : X_OR2 
      port map ( I0 => N87 , I1 => N357 , O => U328_2_INV ) ;
    U330 : X_OR2 
      port map ( I0 => N368 , I1 => N369 , O => N573 ) ;
    U331 : X_INV 
      port map ( I => N240 , O => N362 ) ;
    U332 : X_AND2 
      port map ( I0 => N87 , I1 => N241 , O => U332_2_INV ) ;
    U333 : X_OR2 
      port map ( I0 => N87 , I1 => N362 , O => N363 ) ;
    U335 : X_INV 
      port map ( I => N238 , O => N365 ) ;
    U336 : X_AND2 
      port map ( I0 => N87 , I1 => N239 , O => N366 ) ;
    U337 : X_OR2 
      port map ( I0 => N87 , I1 => N365 , O => U337_2_INV ) ;
    U339 : X_OR2 
      port map ( I0 => N377 , I1 => N376 , O => N572 ) ;
    U340 : X_INV 
      port map ( I => N234 , O => N370 ) ;
    U341 : X_AND2 
      port map ( I0 => N87 , I1 => N235 , O => N371 ) ;
    U342 : X_OR2 
      port map ( I0 => N87 , I1 => N370 , O => U342_2_INV ) ;
    U344 : X_INV 
      port map ( I => N236 , O => N373 ) ;
    U345 : X_AND2 
      port map ( I0 => N87 , I1 => N237 , O => U345_2_INV ) ;
    U346 : X_OR2 
      port map ( I0 => N87 , I1 => N373 , O => N374 ) ;
    U348 : X_OR2 
      port map ( I0 => N386 , I1 => N385 , O => N571 ) ;
    U349 : X_INV 
      port map ( I => N230 , O => N378 ) ;
    U352 : X_AND2 
      port map ( I0 => N379 , I1 => N380 , O => U352_2_INV ) ;
    U353 : X_INV 
      port map ( I => N87 , O => N382 ) ;
    U354 : X_INV 
      port map ( I => N86 , O => N381 ) ;
    U357 : X_AND2 
      port map ( I0 => N383 , I1 => N384 , O => U357_2_INV ) ;
    U358 : X_OR2 
      port map ( I0 => N394 , I1 => N395 , O => N570 ) ;
    U359 : X_INV 
      port map ( I => N87 , O => N388 ) ;
    U360 : X_INV 
      port map ( I => N86 , O => N387 ) ;
    U363 : X_AND2 
      port map ( I0 => N389 , I1 => N390 , O => U363_2_INV ) ;
    U364 : X_INV 
      port map ( I => N226 , O => N391 ) ;
    U367 : X_AND2 
      port map ( I0 => N392 , I1 => N393 , O => U367_2_INV ) ;
    U368 : X_OR2 
      port map ( I0 => N403 , I1 => N404 , O => N569 ) ;
    U369 : X_INV 
      port map ( I => N87 , O => N397 ) ;
    U370 : X_INV 
      port map ( I => N86 , O => N396 ) ;