time_sim.sdf

实用的程序代码

  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U330)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1316:1316:1316) (1316:1316:1316))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U331)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1621:1621:1621) (1621:1621:1621))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (2395:2395:2395) (2395:2395:2395))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U332)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))
        (PORT IN1  (2699:2699:2699) (2699:2699:2699))
        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U333)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1173:1173:1173) (1173:1173:1173))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U334)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (2034:2034:2034) (2034:2034:2034))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (3017:3017:3017) (3017:3017:3017))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U335)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))
        (PORT IN1  (6636:6636:6636) (6636:6636:6636))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
    (CELLTYPE "X_FF")
    (INSTANCE I_1\/E2RQ_reg)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (PORT CLK  (1219:1219:1219) (1219:1219:1219))
        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))
        (PORT CE  (4001:4001:4001) (4001:4001:4001))
        (IOPATH SET OUT  (0:0:0) (0:0:0))
        (PORT RST  (0:0:0) (0:0:0))
        (IOPATH RST OUT  (0:0:0) (0:0:0))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))
      (WIDTH (negedge CLK)  (4000:4000:4000))
      (SETUP RST (posedge CLK) (0:0:0))
      (SETUP CE (posedge CLK) (0:0:0))
      (SETUP IN (posedge CLK) (0:0:0))
      (HOLD CE (posedge CLK) (0:0:0))
      (HOLD IN (posedge CLK) (0:0:0))
      (HOLD RST (posedge CLK) (0:0:0))
      (WIDTH (posedge RST)  (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U336)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U337)
    (DELAY
      (ABSOLUTE
        (PORT IN  (2106:2106:2106) (2106:2106:2106))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U338)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (2968:2968:2968) (2968:2968:2968))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (0:0:0) (0:0:0))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U339)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (2424:2424:2424) (2424:2424:2424))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U340)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))
        (PORT IN1  (6393:6393:6393) (6393:6393:6393))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U341)
    (DELAY
      (ABSOLUTE
        (PORT IN  (1880:1880:1880) (1880:1880:1880))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U342)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1356:1356:1356) (1356:1356:1356))
        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))
        (PORT IN1  (0:0:0) (0:0:0))
        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))
      )
    )
  )
  (CELL
    (CELLTYPE "X_FF")
    (INSTANCE I_1\/DCNT_reg\<0\>)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (PORT CLK  (1225:1225:1225) (1225:1225:1225))
        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))
        (PORT CE  (5198:5198:5198) (5198:5198:5198))
        (IOPATH SET OUT  (0:0:0) (0:0:0))
        (PORT RST  (0:0:0) (0:0:0))
        (IOPATH RST OUT  (0:0:0) (0:0:0))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))
      (WIDTH (negedge CLK)  (4000:4000:4000))
      (SETUP RST (posedge CLK) (0:0:0))
      (SETUP CE (posedge CLK) (0:0:0))
      (SETUP IN (posedge CLK) (0:0:0))
      (HOLD IN (posedge CLK) (0:0:0))
      (HOLD CE (posedge CLK) (0:0:0))
      (HOLD RST (posedge CLK) (0:0:0))
      (WIDTH (posedge RST)  (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "X_XOR2")
    (INSTANCE U343)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1177:1177:1177) (1177:1177:1177))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U344)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1547:1547:1547) (1547:1547:1547))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1483:1483:1483) (1483:1483:1483))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U345)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))
        (PORT IN1  (1547:1547:1547) (1547:1547:1547))
        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))
      )
    )
  )
  (CELL
    (CELLTYPE "X_XOR2")
    (INSTANCE U346)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1186:1186:1186) (1186:1186:1186))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U347)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1232:1232:1232) (1232:1232:1232))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1157:1157:1157) (1157:1157:1157))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U348)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))
        (PORT IN1  (1753:1753:1753) (1753:1753:1753))
        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))
      )
    )
  )
  (CELL
    (CELLTYPE "X_FF")
    (INSTANCE I_1\/ZCNT_reg\<4\>)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (PORT CLK  (1231:1231:1231) (1231:1231:1231))
        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))
        (PORT CE  (4759:4759:4759) (4759:4759:4759))
        (IOPATH SET OUT  (0:0:0) (0:0:0))
        (PORT RST  (0:0:0) (0:0:0))
        (IOPATH RST OUT  (0:0:0) (0:0:0))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))
      (WIDTH (negedge CLK)  (4000:4000:4000))
      (SETUP RST (posedge CLK) (0:0:0))
      (SETUP CE (posedge CLK) (0:0:0))
      (SETUP IN (posedge CLK) (0:0:0))
      (HOLD RST (posedge CLK) (0:0:0))
      (HOLD CE (posedge CLK) (0:0:0))
      (HOLD IN (posedge CLK) (0:0:0))
      (WIDTH (posedge RST)  (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "X_XOR2")
    (INSTANCE U349)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1024:1024:1024) (1024:1024:1024))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U350)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1608:1608:1608) (1608:1608:1608))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (1193:1193:1193) (1193:1193:1193))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U351)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))
        (PORT IN1  (1753:1753:1753) (1753:1753:1753))
        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))
      )
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U352)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U353)
    (DELAY
      (ABSOLUTE
        (PORT IN  (2193:2193:2193) (2193:2193:2193))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U354)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1442:1442:1442) (1442:1442:1442))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (0:0:0) (0:0:0))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U355)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (3017:3017:3017) (3017:3017:3017))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U356)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))
        (PORT IN1  (6566:6566:6566) (6566:6566:6566))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
    (CELLTYPE "X_FF")
    (INSTANCE I_1\/ZCNT_reg\<6\>)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (PORT CLK  (1212:1212:1212) (1212:1212:1212))
        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))
        (PORT CE  (4571:4571:4571) (4571:4571:4571))
        (IOPATH SET OUT  (0:0:0) (0:0:0))
        (PORT RST  (0:0:0) (0:0:0))
        (IOPATH RST OUT  (0:0:0) (0:0:0))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))
      (WIDTH (negedge CLK)  (4000:4000:4000))
      (SETUP RST (posedge CLK) (0:0:0))
      (SETUP CE (posedge CLK) (0:0:0))
      (SETUP IN (posedge CLK) (0:0:0))
      (HOLD CE (posedge CLK) (0:0:0))
      (HOLD RST (posedge CLK) (0:0:0))
      (HOLD IN (posedge CLK) (0:0:0))
      (WIDTH (posedge RST)  (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U357)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U358)
    (DELAY
      (ABSOLUTE
        (PORT IN  (2650:2650:2650) (2650:2650:2650))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U359)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1183:1183:1183) (1183:1183:1183))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (0:0:0) (0:0:0))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U360)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (0:0:0) (0:0:0))
        (PORT IN1  (2451:2451:2451) (2451:2451:2451))
        (IOPATH IN1 OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_AND2")
    (INSTANCE U361)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (0:0:0) (0:0:0))
        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))
        (PORT IN1  (6393:6393:6393) (6393:6393:6393))
        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
    (CELLTYPE "X_INV")
    (INSTANCE U362)
    (DELAY
      (ABSOLUTE
        (PORT IN  (1879:1879:1879) (1879:1879:1879))
        (IOPATH IN OUT  (0:0:0) (0:0:0))
      )
    )
  )
  (CELL
    (CELLTYPE "X_OR2")
    (INSTANCE U363)
    (DELAY
      (ABSOLUTE
        (PORT IN0  (1296:1296:1296) (1296:1296:1296))
        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))
        (PORT IN1  (0:0:0) (0:0:0))
        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))
      )
    )
  )
  (CELL
    (CELLTYPE "X_FF")
    (INSTANCE I_0\/DCNT_reg\<0\>)
    (DELAY
      (ABSOLUTE
        (PORT IN  (0:0:0) (0:0:0))
        (PORT CLK  (1206:1206:1206) (1206:1206:1206))
        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))
        (PORT CE  (5190:5190:5190) (5190:5190:5190))
        (IOPATH SET OUT  (0:0:0) (0:0:0))
        (PORT RST  (0:0:0) (0:0:0))
        (IOPATH RST OUT  (0:0:0) (0:0:0))
      )
    )
    (TIMINGCHECK
      (WIDTH (posedge CLK)  (4000:4000:4000))
      (WIDTH (negedge CLK)  (4000:4000:4000))
      (SETUP RST (posedge CLK) (0:0:0))
      (SETUP CE (posedge CLK) (0:0:0))
      (SETUP IN (posedge CLK) (0:0:0))
      (HOLD IN (posedge CLK) (0:0:0))
      (HOLD CE (posed