time_sim.v

实用的程序代码

// Xilinx Verilog produced by program ngd2ver, Version M1.4.12
// Date: Tue Jan  6 19:18:24 1998
// Design file: time_sim.nga
// Device: 4005epc84-2
`timescale 1 ns/1 ps
`uselib dir=/home/zeppelin2/tech_apps/m1_4.12/verilog/data libext=.vmd

  module parameter2 (sel, out, a, b);
    input sel;
    output [7:0] out;
    input [7:0] a;
    input [7:0] b;

    wire n246, n247, n248, n249, n250, n251, n252, n253, n110, n111, n112, n113
    , n114, n115, n116, n117, n118, n119, n120, n121, n122, n123, n124, n125, 
    n126, n222, n224, n223, n225, n227, n226, n228, n230, n229, n231, n233, n232
    , n234, n236, n235, n237, n239, n238, n240, n242, n241, n243, n245, n244, 
    \U132/$1I20_GTS_TRI , \U133/$1I20_GTS_TRI , \U134/$1I20_GTS_TRI , 
    \U135/$1I20_GTS_TRI , \U136/$1I20_GTS_TRI , \U137/$1I20_GTS_TRI , 
    \U138/$1I20_GTS_TRI , \U139/$1I20_GTS_TRI , U159_2_INV, U160_2_INV, 
    U163_2_INV, U164_2_INV, U167_2_INV, U168_2_INV, U171_2_INV, U172_2_INV, 
    U175_2_INV, U176_2_INV, U179_2_INV, U180_2_INV, U183_2_INV, U184_2_INV, 
    U187_2_INV, U188_2_INV, \U132/$1I20_GTS_TRI_2_INV , 
    \U133/$1I20_GTS_TRI_2_INV , \U134/$1I20_GTS_TRI_2_INV , 
    \U135/$1I20_GTS_TRI_2_INV , \U136/$1I20_GTS_TRI_2_INV , 
    \U137/$1I20_GTS_TRI_2_INV , \U138/$1I20_GTS_TRI_2_INV , 
    \U139/$1I20_GTS_TRI_2_INV ;
    `ifdef GTS_SIGNAL
      wire GTS = `GTS_SIGNAL ;
    `else
      wire GTS ;
    `endif
    initial $sdf_annotate("time_sim.sdf");

    X_BUF U140 (.IN (a[7]), .OUT (n110));
    X_BUF U141 (.IN (a[6]), .OUT (n111));
    X_BUF U142 (.IN (a[5]), .OUT (n112));
    X_BUF U143 (.IN (a[4]), .OUT (n113));
    X_BUF U144 (.IN (a[3]), .OUT (n114));
    X_BUF U145 (.IN (a[2]), .OUT (n115));
    X_BUF U146 (.IN (a[1]), .OUT (n116));
    X_BUF U147 (.IN (a[0]), .OUT (n117));
    X_BUF U148 (.IN (b[7]), .OUT (n118));
    X_BUF U149 (.IN (b[6]), .OUT (n119));
    X_BUF U150 (.IN (b[5]), .OUT (n120));
    X_BUF U151 (.IN (b[4]), .OUT (n121));
    X_BUF U152 (.IN (b[3]), .OUT (n122));
    X_BUF U153 (.IN (b[2]), .OUT (n123));
    X_BUF U154 (.IN (b[1]), .OUT (n124));
    X_BUF U155 (.IN (b[0]), .OUT (n125));
    X_BUF U156 (.IN (sel), .OUT (n126));
    X_INV U157 (.IN (n125), .OUT (n222));
    X_OR2 U158 (.IN0 (n126), .IN1 (n222), .OUT (n224));
    X_AND2 U159 (.IN0 (n126), .IN1 (n117), .OUT (U159_2_INV));
    X_AND2 U160 (.IN0 (n223), .IN1 (n224), .OUT (U160_2_INV));
    X_INV U161 (.IN (n124), .OUT (n225));
    X_OR2 U162 (.IN0 (n126), .IN1 (n225), .OUT (n227));
    X_AND2 U163 (.IN0 (n126), .IN1 (n116), .OUT (U163_2_INV));
    X_AND2 U164 (.IN0 (n226), .IN1 (n227), .OUT (U164_2_INV));
    X_INV U165 (.IN (n123), .OUT (n228));
    X_OR2 U166 (.IN0 (n126), .IN1 (n228), .OUT (n230));
    X_AND2 U167 (.IN0 (n126), .IN1 (n115), .OUT (U167_2_INV));
    X_AND2 U168 (.IN0 (n229), .IN1 (n230), .OUT (U168_2_INV));
    X_INV U169 (.IN (n122), .OUT (n231));
    X_OR2 U170 (.IN0 (n126), .IN1 (n231), .OUT (n233));
    X_AND2 U171 (.IN0 (n126), .IN1 (n114), .OUT (U171_2_INV));
    X_AND2 U172 (.IN0 (n232), .IN1 (n233), .OUT (U172_2_INV));
    X_INV U173 (.IN (n121), .OUT (n234));
    X_OR2 U174 (.IN0 (n126), .IN1 (n234), .OUT (n236));
    X_AND2 U175 (.IN0 (n126), .IN1 (n113), .OUT (U175_2_INV));
    X_AND2 U176 (.IN0 (n235), .IN1 (n236), .OUT (U176_2_INV));
    X_INV U177 (.IN (n120), .OUT (n237));
    X_OR2 U178 (.IN0 (n126), .IN1 (n237), .OUT (n239));
    X_AND2 U179 (.IN0 (n126), .IN1 (n112), .OUT (U179_2_INV));
    X_AND2 U180 (.IN0 (n238), .IN1 (n239), .OUT (U180_2_INV));
    X_INV U181 (.IN (n119), .OUT (n240));
    X_OR2 U182 (.IN0 (n126), .IN1 (n240), .OUT (n242));
    X_AND2 U183 (.IN0 (n126), .IN1 (n111), .OUT (U183_2_INV));
    X_AND2 U184 (.IN0 (n241), .IN1 (n242), .OUT (U184_2_INV));
    X_INV U185 (.IN (n118), .OUT (n243));
    X_OR2 U186 (.IN0 (n126), .IN1 (n243), .OUT (n245));
    X_AND2 U187 (.IN0 (n126), .IN1 (n110), .OUT (U187_2_INV));
    X_AND2 U188 (.IN0 (n244), .IN1 (n245), .OUT (U188_2_INV));
    X_OPAD \out<7>_PAD  (.PAD (out[7]));
    X_OPAD \out<6>_PAD  (.PAD (out[6]));
    X_OPAD \out<5>_PAD  (.PAD (out[5]));
    X_OPAD \out<4>_PAD  (.PAD (out[4]));
    X_OPAD \out<3>_PAD  (.PAD (out[3]));
    X_OPAD \out<2>_PAD  (.PAD (out[2]));
    X_OPAD \out<1>_PAD  (.PAD (out[1]));
    X_OPAD \out<0>_PAD  (.PAD (out[0]));
    X_IPAD \a<7>_PAD  (.PAD (a[7]));
    X_IPAD \a<6>_PAD  (.PAD (a[6]));
    X_IPAD \a<5>_PAD  (.PAD (a[5]));
    X_IPAD \a<4>_PAD  (.PAD (a[4]));
    X_IPAD \a<3>_PAD  (.PAD (a[3]));
    X_IPAD \a<2>_PAD  (.PAD (a[2]));
    X_IPAD \a<1>_PAD  (.PAD (a[1]));
    X_IPAD \a<0>_PAD  (.PAD (a[0]));
    X_IPAD \b<7>_PAD  (.PAD (b[7]));
    X_IPAD \b<6>_PAD  (.PAD (b[6]));
    X_IPAD \b<5>_PAD  (.PAD (b[5]));
    X_IPAD \b<4>_PAD  (.PAD (b[4]));
    X_IPAD \b<3>_PAD  (.PAD (b[3]));
    X_IPAD \b<2>_PAD  (.PAD (b[2]));
    X_IPAD \b<1>_PAD  (.PAD (b[1]));
    X_IPAD \b<0>_PAD  (.PAD (b[0]));
    X_IPAD sel_PAD (.PAD (sel));
    X_BUF \U132/$1I20  (.IN (n246), .OUT (\U132/$1I20_GTS_TRI ));
    X_TRI \U132/$1I20_GTS_TRI_99  (.IN (\U132/$1I20_GTS_TRI ), .OUT (out[7]), 
    .CTL (\U132/$1I20_GTS_TRI_2_INV ));
    X_BUF \U133/$1I20  (.IN (n247), .OUT (\U133/$1I20_GTS_TRI ));
    X_TRI \U133/$1I20_GTS_TRI_100  (.IN (\U133/$1I20_GTS_TRI ), .OUT (out[6]), 
    .CTL (\U133/$1I20_GTS_TRI_2_INV ));
    X_BUF \U134/$1I20  (.IN (n248), .OUT (\U134/$1I20_GTS_TRI ));
    X_TRI \U134/$1I20_GTS_TRI_101  (.IN (\U134/$1I20_GTS_TRI ), .OUT (out[5]), 
    .CTL (\U134/$1I20_GTS_TRI_2_INV ));
    X_BUF \U135/$1I20  (.IN (n249), .OUT (\U135/$1I20_GTS_TRI ));
    X_TRI \U135/$1I20_GTS_TRI_102  (.IN (\U135/$1I20_GTS_TRI ), .OUT (out[4]), 
    .CTL (\U135/$1I20_GTS_TRI_2_INV ));
    X_BUF \U136/$1I20  (.IN (n250), .OUT (\U136/$1I20_GTS_TRI ));
    X_TRI \U136/$1I20_GTS_TRI_103  (.IN (\U136/$1I20_GTS_TRI ), .OUT (out[3]), 
    .CTL (\U136/$1I20_GTS_TRI_2_INV ));
    X_BUF \U137/$1I20  (.IN (n251), .OUT (\U137/$1I20_GTS_TRI ));
    X_TRI \U137/$1I20_GTS_TRI_104  (.IN (\U137/$1I20_GTS_TRI ), .OUT (out[2]), 
    .CTL (\U137/$1I20_GTS_TRI_2_INV ));
    X_BUF \U138/$1I20  (.IN (n252), .OUT (\U138/$1I20_GTS_TRI ));
    X_TRI \U138/$1I20_GTS_TRI_105  (.IN (\U138/$1I20_GTS_TRI ), .OUT (out[1]), 
    .CTL (\U138/$1I20_GTS_TRI_2_INV ));
    X_BUF \U139/$1I20  (.IN (n253), .OUT (\U139/$1I20_GTS_TRI ));
    X_TRI \U139/$1I20_GTS_TRI_106  (.IN (\U139/$1I20_GTS_TRI ), .OUT (out[0]), 
    .CTL (\U139/$1I20_GTS_TRI_2_INV ));
    X_INV U159_2_INV_107 (.IN (U159_2_INV), .OUT (n223));
    X_INV U160_2_INV_108 (.IN (U160_2_INV), .OUT (n253));
    X_INV U163_2_INV_109 (.IN (U163_2_INV), .OUT (n226));
    X_INV U164_2_INV_110 (.IN (U164_2_INV), .OUT (n252));
    X_INV U167_2_INV_111 (.IN (U167_2_INV), .OUT (n229));
    X_INV U168_2_INV_112 (.IN (U168_2_INV), .OUT (n251));
    X_INV U171_2_INV_113 (.IN (U171_2_INV), .OUT (n232));
    X_INV U172_2_INV_114 (.IN (U172_2_INV), .OUT (n250));
    X_INV U175_2_INV_115 (.IN (U175_2_INV), .OUT (n235));
    X_INV U176_2_INV_116 (.IN (U176_2_INV), .OUT (n249));
    X_INV U179_2_INV_117 (.IN (U179_2_INV), .OUT (n238));
    X_INV U180_2_INV_118 (.IN (U180_2_INV), .OUT (n248));
    X_INV U183_2_INV_119 (.IN (U183_2_INV), .OUT (n241));
    X_INV U184_2_INV_120 (.IN (U184_2_INV), .OUT (n247));
    X_INV U187_2_INV_121 (.IN (U187_2_INV), .OUT (n244));
    X_INV U188_2_INV_122 (.IN (U188_2_INV), .OUT (n246));
    X_INV \U132/$1I20_GTS_TRI_2_INV_123  (.IN (GTS), .OUT 
    (\U132/$1I20_GTS_TRI_2_INV ));
    X_INV \U133/$1I20_GTS_TRI_2_INV_124  (.IN (GTS), .OUT 
    (\U133/$1I20_GTS_TRI_2_INV ));
    X_INV \U134/$1I20_GTS_TRI_2_INV_125  (.IN (GTS), .OUT 
    (\U134/$1I20_GTS_TRI_2_INV ));
    X_INV \U135/$1I20_GTS_TRI_2_INV_126  (.IN (GTS), .OUT 
    (\U135/$1I20_GTS_TRI_2_INV ));
    X_INV \U136/$1I20_GTS_TRI_2_INV_127  (.IN (GTS), .OUT 
    (\U136/$1I20_GTS_TRI_2_INV ));
    X_INV \U137/$1I20_GTS_TRI_2_INV_128  (.IN (GTS), .OUT 
    (\U137/$1I20_GTS_TRI_2_INV ));
    X_INV \U138/$1I20_GTS_TRI_2_INV_129  (.IN (GTS), .OUT 
    (\U138/$1I20_GTS_TRI_2_INV ));
    X_INV \U139/$1I20_GTS_TRI_2_INV_130  (.IN (GTS), .OUT 
    (\U139/$1I20_GTS_TRI_2_INV ));
    X_PD NGD2VER_PD_106 (.OUT (GTS) );
  endmodule