dynamic_digital.map.qmsg

利用两个数码管

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Aug 12 10:56:09 2008 " "Info: Processing started: Tue Aug 12 10:56:09 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Dynamic_digital -c Dynamic_digital " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Dynamic_digital -c Dynamic_digital" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Dynamic_digital.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file Dynamic_digital.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Dynamic_digital-lxf " "Info: Found design unit 1: Dynamic_digital-lxf" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 Dynamic_digital " "Info: Found entity 1: Dynamic_digital" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "Dynamic_digital " "Info: Elaborating entity \"Dynamic_digital\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "3 " "Info: Inferred 3 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "countshi\[0\]~136 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"countshi\[0\]~136\"" {  } { { "Dynamic_digital.vhd" "countshi\[0\]~136" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 34 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "cnt1\[0\]~12 12 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=12) from the following logic: \"cnt1\[0\]~12\"" {  } { { "Dynamic_digital.vhd" "cnt1\[0\]~12" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 23 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "cnt2\[0\]~14 14 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=14) from the following logic: \"cnt2\[0\]~14\"" {  } { { "Dynamic_digital.vhd" "cnt2\[0\]~14" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 34 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0}  } {  } 0 0 "Inferred %1!d! megafunctions from design logic" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf" 233 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:countshi_rtl_0 " "Info: Elaborated megafunction instantiation \"lpm_counter:countshi_rtl_0\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:cnt1_rtl_1 " "Info: Elaborated megafunction instantiation \"lpm_counter:cnt1_rtl_1\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:cnt2_rtl_2 " "Info: Elaborated megafunction instantiation \"lpm_counter:cnt2_rtl_2\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lpm_counter:cnt1_rtl_1\|dffs\[11\] data_in GND " "Warning: Reduced register \"lpm_counter:cnt1_rtl_1\|dffs\[11\]\" with stuck data_in port to stuck value GND" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf" 268 9 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lpm_counter:cnt1_rtl_1\|dffs\[10\] data_in GND " "Warning: Reduced register \"lpm_counter:cnt1_rtl_1\|dffs\[10\]\" with stuck data_in port to stuck value GND" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf" 268 9 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lpm_counter:cnt2_rtl_2\|dffs\[13\] data_in GND " "Warning: Reduced register \"lpm_counter:cnt2_rtl_2\|dffs\[13\]\" with stuck data_in port to stuck value GND" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf" 268 9 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "wei\[2\] GND " "Warning: Pin \"wei\[2\]\" stuck at GND" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 7 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "wei\[3\] GND " "Warning: Pin \"wei\[3\]\" stuck at GND" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 7 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "wei\[4\] GND " "Warning: Pin \"wei\[4\]\" stuck at GND" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 7 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "wei\[5\] GND " "Warning: Pin \"wei\[5\]\" stuck at GND" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 7 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "duan\[7\] VCC " "Warning: Pin \"duan\[7\]\" stuck at VCC" {  } { { "Dynamic_digital.vhd" "" { Text "D:/CPLD开发板/2.epm3128板资料/1实验代码部分（vhdl在板子上可以直接运行）/7 数码管动态显示/Dynamic_digita/Dynamic_digital.vhd" 8 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clk " "Info: Promoted clock signal driven by pin \"clk\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "99 " "Info: Implemented 99 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "1 " "Info: Implemented 1 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "14 " "Info: Implemented 14 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_MCELLS" "76 " "Info: Implemented 76 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0} { "Info" "ISCL_SCL_TM_SEXPS" "8 " "Info: Implemented 8 shareable expanders" {  } {  } 0 0 "Implemented %1!d! shareable expanders" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 9 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 9 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Aug 12 10:56:12 2008 " "Info: Processing ended: Tue Aug 12 10:56:12 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}