color_char_mode_svga_ctrl.edf

此ip核是xvga视频接口控制器

(edif (rename color_char_mode_svga_ctrl "COLOR_CHAR_MODE_SVGA_CTRL")
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timeStamp 2005 2 22 10 50 18)
      (author "Synplicity, Inc.")
      (program "Synplify Pro" (version "7.3.5, Build 256R"))
     )
   )
  (library VIRTEX
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell RAMB16_S9 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port (array (rename do "DO[7:0]") 8) (direction OUTPUT))
           (port (array (rename addr "ADDR[10:0]") 11) (direction INPUT))
           (port (array (rename di "DI[7:0]") 8) (direction INPUT))
           (port (rename DOP_0 "DOP[0]") (direction OUTPUT))
           (port (rename DIP_0 "DIP[0]") (direction INPUT))
           (port EN (direction INPUT))
           (port CLK (direction INPUT)
 )
           (port WE (direction INPUT))
           (port SSR (direction INPUT))
         )
       )
    )
    (cell LUT4_L (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port I2 (direction INPUT))
           (port I3 (direction INPUT))
           (port LO (direction OUTPUT))
         )
       )
    )
    (cell LUT4 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port I2 (direction INPUT))
           (port I3 (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell LUT3_L (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port I2 (direction INPUT))
           (port LO (direction OUTPUT))
         )
       )
    )
    (cell LUT3 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port I2 (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell LUT2_L (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port LO (direction OUTPUT))
         )
       )
    )
    (cell LUT2 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell LUT1 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell XORCY (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port LI (direction INPUT))
           (port CI (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell MUXCY_L (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port DI (direction INPUT))
           (port CI (direction INPUT))
           (port S (direction INPUT))
           (port LO (direction OUTPUT))
         )
       )
    )
    (cell BUFT (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I (direction INPUT))
           (port T (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
  )
  (library UNILIB
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell FDP (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port Q (direction OUTPUT))
           (port D (direction INPUT))
           (port C (direction INPUT)
 )
           (port PRE (direction INPUT))
         )
       )
    )
    (cell FDC (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port Q (direction OUTPUT))
           (port D (direction INPUT))
           (port C (direction INPUT)
 )
           (port CLR (direction INPUT))
         )
       )
    )
    (cell FDPE (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port Q (direction OUTPUT))
           (port D (direction INPUT))
           (port C (direction INPUT)
 )
           (port PRE (direction INPUT))
           (port CE (direction INPUT))
         )
       )
    )
    (cell FDCE (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port Q (direction OUTPUT))
           (port D (direction INPUT))
           (port C (direction INPUT)
 )
           (port CLR (direction INPUT))
           (port CE (direction INPUT))
         )
       )
    )
    (cell INV (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell GND (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port G (direction OUTPUT))
         )
       )
    )
    (cell VCC (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port P (direction OUTPUT))
         )
       )
    )
  )
  (library work
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell CHAR_GEN_ROM (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename bram_din "BRAM_Din[31:24]") 8) (direction INPUT))
           (port (array (rename char_line_count "char_line_count[2:0]") 3) (direction INPUT))
           (port (array (rename char_gen_rom_data "char_gen_rom_data[7:0]") 8) (direction OUTPUT))
           (port pixel_clock (direction INPUT))
         )
         (contents
          (instance CHARACTER_GEN_ROM (viewRef PRIM (cellRef RAMB16_S9 (libraryRef VIRTEX)))
          )
          (instance GND (viewRef PRIM (cellRef GND (libraryRef UNILIB)))          )
          (instance VCC (viewRef PRIM (cellRef VCC (libraryRef UNILIB)))          )
          (net (rename bram_din_24 "BRAM_Din[24]") (joined
           (portRef (member bram_din 7))
           (portRef (member addr 0) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_25 "BRAM_Din[25]") (joined
           (portRef (member bram_din 6))
           (portRef (member addr 1) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_26 "BRAM_Din[26]") (joined
           (portRef (member bram_din 5))
           (portRef (member addr 2) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_27 "BRAM_Din[27]") (joined
           (portRef (member bram_din 4))
           (portRef (member addr 3) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_28 "BRAM_Din[28]") (joined
           (portRef (member bram_din 3))
           (portRef (member addr 4) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_29 "BRAM_Din[29]") (joined
           (portRef (member bram_din 2))
           (portRef (member addr 5) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_30 "BRAM_Din[30]") (joined
           (portRef (member bram_din 1))
           (portRef (member addr 6) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename bram_din_31 "BRAM_Din[31]") (joined
           (portRef (member bram_din 0))
           (portRef (member addr 7) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename char_line_count_0 "char_line_count[0]") (joined
           (portRef (member char_line_count 2))
           (portRef (member addr 10) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename char_line_count_1 "char_line_count[1]") (joined
           (portRef (member char_line_count 1))
           (portRef (member addr 9) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename char_line_count_2 "char_line_count[2]") (joined
           (portRef (member char_line_count 0))
           (portRef (member addr 8) (instanceRef CHARACTER_GEN_ROM))
          ))
          (net (rename char_gen_rom_data_0 "char_gen_rom_data[0]") (joined
           (portRef (member do 7) (instanceRef CHARACTER_GEN_ROM))
           (portRef (member char_gen_rom_data 7))
          ))
          (net (rename char_gen_rom_data_1 "char_gen_rom_data[1]") (joined
           (portRef (member do 6) (instanceRef CHARACTER_GEN_ROM))
           (portRef (member char_gen_rom_data 6))
          ))
          (net (rename char_gen_rom_data_2 "char_gen_rom_data[2]") (joined
           (portRef (member do 5) (instanceRef CHARACTER_GEN_ROM))
           (portRef (member char_gen_rom_data 5))
          ))
          (net (rename char_gen_rom_data_3 "char_gen_rom_data[3]") (joined