spi_to_i2c.hier_info

VHDL实现SPI接口转I2c接口的源代码

|SPI_to_I2C
SPI_sclk => SPI_sclk~0.IN1
SPI_cs => SPI_cs~0.IN2
SPI_miso <= SPI_slave:spi.miso
SPI_mosi => SPI_mosi~0.IN1
I2C_sda <= I2C_master:i2c.sda
I2C_scl <= I2C_master:i2c.scl


|SPI_to_I2C|internal_oss_altufm_osc_7p3:ufmosc
osc <= maxii_ufm_block1.OSC
oscena => maxii_ufm_block1.OSCENA


|SPI_to_I2C|divider:divide
osc => count[9].CLK
osc => count[8].CLK
osc => count[7].CLK
osc => count[6].CLK
osc => count[5].CLK
osc => count[4].CLK
osc => count[3].CLK
osc => count[2].CLK
osc => count[1].CLK
osc => count[0].CLK
cpld_clk <= count[9].DB_MAX_OUTPUT_PORT_TYPE


|SPI_to_I2C|SPI_slave:spi
miso <= miso~reg0.DB_MAX_OUTPUT_PORT_TYPE
mosi => data_in~7.DATAB
mosi => data_in~6.DATAB
mosi => data_in~5.DATAB
mosi => data_in~4.DATAB
mosi => data_in~3.DATAB
mosi => data_in~2.DATAB
mosi => data_in~1.DATAB
mosi => data_in~0.DATAB
mosi => command_reg~7.DATAB
mosi => command_reg~6.DATAB
mosi => command_reg~5.DATAB
mosi => command_reg~4.DATAB
mosi => command_reg~3.DATAB
mosi => command_reg~2.DATAB
mosi => command_reg~1.DATAB
mosi => command_reg~0.DATAB
cs => done~reg0.ACLR
cs => done1~reg0.ACLR
cs => count[3]~reg0.ACLR
cs => count[2]~reg0.ACLR
cs => count[1]~reg0.ACLR
cs => count[0]~reg0.ACLR
cs => count_1[3]~reg0.ENA
cs => count_1[2]~reg0.ENA
cs => count_1[1]~reg0.ENA
cs => count_1[0]~reg0.ENA
sclk => count[3]~reg0.CLK
sclk => count[2]~reg0.CLK
sclk => count[1]~reg0.CLK
sclk => count[0]~reg0.CLK
sclk => count_1[3]~reg0.CLK
sclk => count_1[2]~reg0.CLK
sclk => count_1[1]~reg0.CLK
sclk => count_1[0]~reg0.CLK
sclk => miso~reg0.CLK
sclk => done1~reg0.CLK
sclk => command_reg[7]~reg0.CLK
sclk => command_reg[6]~reg0.CLK
sclk => command_reg[5]~reg0.CLK
sclk => command_reg[4]~reg0.CLK
sclk => command_reg[3]~reg0.CLK
sclk => command_reg[2]~reg0.CLK
sclk => command_reg[1]~reg0.CLK
sclk => command_reg[0]~reg0.CLK
sclk => data_in[7]~reg0.CLK
sclk => data_in[6]~reg0.CLK
sclk => data_in[5]~reg0.CLK
sclk => data_in[4]~reg0.CLK
sclk => data_in[3]~reg0.CLK
sclk => data_in[2]~reg0.CLK
sclk => data_in[1]~reg0.CLK
sclk => data_in[0]~reg0.CLK
command_reg[0] <= command_reg[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[1] <= command_reg[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[2] <= command_reg[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[3] <= command_reg[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[4] <= command_reg[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[5] <= command_reg[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[6] <= command_reg[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_reg[7] <= command_reg[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[0] <= data_in[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[1] <= data_in[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[2] <= data_in[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[3] <= data_in[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[4] <= data_in[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[5] <= data_in[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[6] <= data_in[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_in[7] <= data_in[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
status_reg[0] => Mux1.IN0
status_reg[1] => Mux1.IN1
status_reg[2] => Mux1.IN2
status_reg[3] => Mux1.IN3
status_reg[4] => Mux1.IN4
status_reg[5] => Mux1.IN5
status_reg[6] => Mux1.IN6
status_reg[7] => Mux1.IN7
data_out[0] => Mux0.IN0
data_out[1] => Mux0.IN1
data_out[2] => Mux0.IN2
data_out[3] => Mux0.IN3
data_out[4] => Mux0.IN4
data_out[5] => Mux0.IN5
data_out[6] => Mux0.IN6
data_out[7] => Mux0.IN7
count_bit[0] <= count[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_bit[1] <= count[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_bit[2] <= count[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_byte <= count[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[0] <= count[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[1] <= count[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[2] <= count[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[3] <= count[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
done <= done~reg0.DB_MAX_OUTPUT_PORT_TYPE
done1 <= done1~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_byte1 <= count_1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_1[0] <= count_1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_1[1] <= count_1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_1[2] <= count_1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count_1[3] <= count_1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|SPI_to_I2C|I2C_master:i2c
sda <= sda~0
scl <= scl~0
cpld_clk => sda_out1~reg0.CLK
cpld_clk => repeat_start_flag.CLK
cpld_clk => scl_out~en.CLK
cpld_clk => scl_out~reg0.CLK
command_reg[0] => command_word[0]~reg0.DATAIN
command_reg[1] => command_word[1]~reg0.DATAIN
command_reg[2] => command_word[2]~reg0.DATAIN
command_reg[3] => command_word[3]~reg0.DATAIN
command_reg[4] => command_word[4]~reg0.DATAIN
command_reg[5] => command_word[5]~reg0.DATAIN
command_reg[6] => command_word[6]~reg0.DATAIN
command_reg[7] => command_word[7]~reg0.DATAIN
command_word[0] <= command_word[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[1] <= command_word[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[2] <= command_word[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[3] <= command_word[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[4] <= command_word[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[5] <= command_word[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[6] <= command_word[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
command_word[7] <= command_word[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
status_reg[0] <= status_reg[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
status_reg[1] <= <GND>
status_reg[2] <= <GND>
status_reg[3] <= <GND>
status_reg[4] <= <GND>
status_reg[5] <= <GND>
status_reg[6] <= <GND>
status_reg[7] <= <GND>
count_byte => ~NO_FANOUT~
cs => command_word[7]~reg0.CLK
cs => command_word[6]~reg0.CLK
cs => command_word[5]~reg0.CLK
cs => command_word[4]~reg0.CLK
cs => command_word[3]~reg0.CLK
cs => command_word[2]~reg0.CLK
cs => command_word[1]~reg0.CLK
cs => command_word[0]~reg0.CLK
cs => sda_out1~0.OUTPUTSELECT
data_in[0] => always10~11.IN1
data_in[1] => always10~10.IN1
data_in[2] => always10~9.IN1
data_in[3] => always10~8.IN1
data_in[4] => always10~7.IN1
data_in[5] => always10~6.IN1
data_in[6] => always10~5.IN1
data_in[7] => always10~4.IN1
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= data_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= data_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= data_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= data_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= data_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[6] <= data_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[7] <= data_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
sda_out <= sda_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
sda_out1 <= sda_out1~reg0.DB_MAX_OUTPUT_PORT_TYPE
scl_out <= scl_out~0.DB_MAX_OUTPUT_PORT_TYPE
count[0] <= count[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[1] <= count[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[2] <= count[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
count[3] <= count[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
sda_is_ack <= count[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
repeat_start <= repeat_start~1.DB_MAX_OUTPUT_PORT_TYPE
sda_out_en <= sda_out_en~0.DB_MAX_OUTPUT_PORT_TYPE
start_stop <= start_stop~reg0.DB_MAX_OUTPUT_PORT_TYPE
start <= start~reg0.DB_MAX_OUTPUT_PORT_TYPE
stop <= stop~reg0.DB_MAX_OUTPUT_PORT_TYPE