_primary.vhd

来自「VHDL实现SPI接口转I2c接口的源代码」· VHDL 代码 · 共 9 行

library verilog;
use verilog.vl_types.all;
entity divider is
    port(
        osc             : in     vl_logic;
        cpld_clk        : out    vl_logic
    );
end divider;