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📄 colorbar.fit.rpt

📁 这个试验要配合EDA4.0底板一起使用.先将核心板插在EDA4.0底板上面,然后接上VGA显示器. 1。源文件保存在src目录
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; PLL Usage                                                                                                                                                                                                ;
+---------------------------------------------+--------------+------+-----+------------------+-------------+-------+------------+---------+---------------+---------------+------------+---------+---------+
; Name                                        ; Output Clock ; Mult ; Div ; Output Frequency ; Phase Shift ; Delay ; Duty Cycle ; Counter ; Counter Delay ; Counter Value ; High / Low ; Initial ; VCO Tap ;
+---------------------------------------------+--------------+------+-----+------------------+-------------+-------+------------+---------+---------------+---------------+------------+---------+---------+
; VGA_PLL:inst4|altpll:altpll_component|_clk0 ; clock0       ; 4    ; 5   ; 40.0 MHz         ; 0 (0 ps)    ; 0 ps  ; 50/50      ; G1      ; --            ; 20            ; 10/10 Even ; 1       ; 0       ;
+---------------------------------------------+--------------+------+-----+------------------+-------------+-------+------------+---------+---------------+---------------+------------+---------+---------+


+------------------------------------------------------------------+
; Output Pin Default Load For Reported TCO                         ;
+---------------------+-------+------------------------------------+
; I/O Standard        ; Load  ; Termination Resistance             ;
+---------------------+-------+------------------------------------+
; LVTTL               ; 10 pF ; Not Available                      ;
; LVCMOS              ; 10 pF ; Not Available                      ;
; 2.5 V               ; 10 pF ; Not Available                      ;
; 1.8 V               ; 10 pF ; Not Available                      ;
; 1.5 V               ; 10 pF ; Not Available                      ;
; SSTL-3 Class I      ; 30 pF ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
; SSTL-3 Class II     ; 30 pF ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
; SSTL-2 Class I      ; 30 pF ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
; SSTL-2 Class II     ; 30 pF ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
; Differential SSTL-2 ; 30 pF ; (See SSTL-2)                       ;
; 3.3-V PCI           ; 10 pF ; 25 Ohm (Parallel)                  ;
; LVDS                ; 4 pF  ; 100 Ohm (Differential)             ;
; RSDS                ; 0 pF  ; 100 Ohm (Differential)             ;
+---------------------+-------+------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                                                                                                                                                              ;
+------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------+
; Compilation Hierarchy Node         ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name                                                  ;
+------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------+
; |ColorBar                          ; 65 (0)      ; 25           ; 0           ; 7    ; 0            ; 40 (0)       ; 0 (0)             ; 25 (0)           ; 22 (0)          ; |ColorBar                                                            ;
;    |VGA_PLL:inst4|                 ; 0 (0)       ; 0            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; |ColorBar|VGA_PLL:inst4                                              ;
;       |altpll:altpll_component|    ; 0 (0)       ; 0            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; |ColorBar|VGA_PLL:inst4|altpll:altpll_component                      ;
;    |vga_vl:inst|                   ; 65 (43)     ; 25           ; 0           ; 0    ; 0            ; 40 (40)      ; 0 (0)             ; 25 (3)           ; 22 (0)          ; |ColorBar|vga_vl:inst                                                ;
;       |lpm_counter:hcnt_rtl_0|     ; 11 (0)      ; 11           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 11 (0)           ; 11 (0)          ; |ColorBar|vga_vl:inst|lpm_counter:hcnt_rtl_0                         ;
;          |cntr_gq7:auto_generated| ; 11 (11)     ; 11           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 11 (11)          ; 11 (11)         ; |ColorBar|vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated ;
;       |lpm_counter:vcnt_rtl_1|     ; 11 (0)      ; 11           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 11 (0)           ; 11 (0)          ; |ColorBar|vga_vl:inst|lpm_counter:vcnt_rtl_1                         ;
;          |cntr_gq7:auto_generated| ; 11 (11)     ; 11           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 11 (11)          ; 11 (11)         ; |ColorBar|vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated ;
+------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------+


+-------------------------------------------------------------------------------------+
; Delay Chain Summary                                                                 ;
+------------+----------+---------------+---------------+-----------------------+-----+
; Name       ; Pin Type ; Pad to Core 0 ; Pad to Core 1 ; Pad to Input Register ; TCO ;
+------------+----------+---------------+---------------+-----------------------+-----+
; rst        ; Input    ; OFF           ; OFF           ; --                    ; --  ;
; clk        ; Input    ; --            ; --            ; --                    ; --  ;
; VGA_HS     ; Output   ; --            ; --            ; --                    ; --  ;
; VGA_VS     ; Output   ; --            ; --            ; --                    ; --  ;
; VGA_RGB[2] ; Output   ; --            ; --            ; --                    ; --  ;
; VGA_RGB[1] ; Output   ; --            ; --            ; --                    ; --  ;
; VGA_RGB[0] ; Output   ; --            ; --            ; --                    ; --  ;
+------------+----------+---------------+---------------+-----------------------+-----+


+-----------------------------------------------------------------------------------------------------------------+
; Pad To Core Delay Chain Fanout                                                                                  ;
+-----------------------------------------------------------------------------------+-------------------+---------+
; Source Pin / Fanout                                                               ; Pad To Core Index ; Setting ;
+-----------------------------------------------------------------------------------+-------------------+---------+
; rst                                                                               ;                   ;         ;
;      - vga_vl:inst|enable                                                         ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella0  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella1  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella2  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella3  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella4  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella5  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella6  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella7  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella8  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella9  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:hcnt_rtl_0|cntr_gq7:auto_generated|counter_cella10 ; 1                 ; OFF     ;
;      - vga_vl:inst|hsyncint                                                       ; 1                 ; OFF     ;
;      - vga_vl:inst|vsync                                                          ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella5  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella0  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella1  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella2  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella9  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella3  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella4  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella6  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella10 ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella7  ; 1                 ; OFF     ;
;      - vga_vl:inst|lpm_counter:vcnt_rtl_1|cntr_gq7:auto_generated|counter_cella8  ; 1                 ; OFF     ;
; clk                                                                               ;                   ;         ;
+-----------------------------------------------------------------------------------+-------------------+---------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Control Signals                                                                                                                         ;
+---------------------------------------------+---------------+---------+--------------+--------+----------------------+------------------+
; Name                                        ; Location      ; Fan-Out ; Usage        ; Global ; Global Resource Used ; Global Line Name ;
+---------------------------------------------+---------------+---------+--------------+--------+----------------------+------------------+
; VGA_PLL:inst4|altpll:altpll_component|_clk0 ; PLL_2         ; 13      ; Clock        ; yes    ; Global clock         ; GCLK4            ;
; clk                                         ; PIN_153       ; 1       ; Clock        ; no     ; --                   ; --               ;
; rst                                         ; PIN_240       ; 25      ; Async. clear ; yes    ; Global clock         ; GCLK3            ;
; vga_vl:inst|LessThan~1207                   ; LC_X32_Y14_N6 ; 11      ; Sync. clear  ; no     ; --                   ; --               ;
; vga_vl:inst|LessThan~1913                   ; LC_X32_Y18_N1 ; 11      ; Sync. clear  ; no     ; --                   ; --               ;
; vga_vl:inst|hsyncint                        ; LC_X32_Y14_N8 ; 13      ; Clock        ; yes    ; Global clock         ; GCLK7            ;
+---------------------------------------------+---------------+---------+--------------+--------+----------------------+------------------+


+-----------------------------------------------------------------------------------------------------------------+
; Global & Other Fast Signals                                                                                     ;
+---------------------------------------------+---------------+---------+----------------------+------------------+
; Name                                        ; Location      ; Fan-Out ; Global Resource Used ; Global Line Name ;
+---------------------------------------------+---------------+---------+----------------------+------------------+
; VGA_PLL:inst4|altpll:altpll_component|_clk0 ; PLL_2         ; 13      ; Global clock         ; GCLK4            ;
; rst                                         ; PIN_240       ; 25      ; Global clock         ; GCLK3            ;
; vga_vl:inst|hsyncint                        ; LC_X32_Y14_N8 ; 13      ; Global clock         ; GCLK7            ;
+---------------------------------------------+---------------+---------+----------------------+------------------+


+-------------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals                                                                 ;
+---------------------------------------------------------------------------------------+---------+
; Name                                                                                  ; Fan-Out ;
+----------------------------------------------------------------

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