report_power.ripple

来自「design compile synthesis user guide」· RIPPLE 代码 · 共 41 行

 
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Report : power
	-analysis_effort low
	-include_boundary_nets
Design : RIPPLE
Version: v3.2a-development
Date   : Wed Nov 30 23:26:08 1994
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Library(s) Used:

    class (File: /remote/cae3/ashu/DesignPower/DP_Tutorial/lib/class.db)


Operating Conditions: WCCOM   Library: class
Wire Loading Model Mode: top

Design           Wire Loading Model      Library
------------------------------------------------
RIPPLE                 10x10             class


Global Operating Voltage = 4.75 
Power-specific unit information :
    Voltage Units = 1V
    Capacitance Units = 0.100000ff
    Time Units = 1ns
    Dynamic Power Units = 100nW    (derived from V,C,T units)
    Leakage Power Units = 1nW


  Cell Internal Power  = 238.2223 nW   (27%)
  Net Switching Power  = 632.3374 nW   (73%)
                         ---------
Total Dynamic Power    = 870.5597 nW  (100%)

Cell Leakage Power     =   4.0000 nW