class.lib

design compile synthesis user guide

library(class) {

/******************************************************************/
/* This is a sample library created for DesignPower tutorial.     */
/* ~smeier/design/power/libraries/lsi/power_lsi2.lib is the       */
/* original library and this is the modified version of it.       */
/* This library contains the two dimensional models for internal  */
/* power characterization. All numbers are bogus numbers but the  */
/* the library is good for the evaluation purpose.                */
/******************************************************************/

    date : "November 14. 1994";
    revision : "V3.2b";


    default_inout_pin_cap        :  1.0;
    default_inout_pin_fall_res   :  0.0;
    default_inout_pin_rise_res   :  0.0;
    default_input_pin_cap        :  1.0;
    default_intrinsic_fall       :  1.0;
    default_intrinsic_rise       :  1.0;
    default_output_pin_cap       :  0.0;
    default_output_pin_fall_res  :  0.0;
    default_output_pin_rise_res  :  0.0;
    default_slope_fall           :  0.0;
    default_slope_rise           :  0.0;
    default_fanout_load          :  1.0;

    
    k_process_drive_fall         :  1.0;
    k_process_drive_rise         :  1.0;
    k_process_intrinsic_fall     :  1.0;
    k_process_intrinsic_rise     :  1.0;
    k_process_pin_cap            :  0.0;
    k_process_slope_fall         :  1.0;
    k_process_slope_rise         :  1.0;
    k_process_wire_cap           :  0.0;
    k_process_wire_res           :  1.0;
    k_temp_drive_fall            :  0.0037;
    k_temp_drive_rise            :  0.0037;
    k_temp_intrinsic_fall        :  0.0037;
    k_temp_intrinsic_rise        :  0.0037;
    k_temp_pin_cap               :  0.0;
    k_temp_slope_fall            :  0.0;
    k_temp_slope_rise            :  0.0;
    k_temp_wire_cap              :  0.0;
    k_temp_wire_res              :  0.0;
    k_volt_drive_fall            : -0.26;
    k_volt_drive_rise            : -0.26;
    k_volt_intrinsic_fall        : -0.26;
    k_volt_intrinsic_rise        : -0.26;
    k_volt_pin_cap               :  0.0;
    k_volt_slope_fall            :  0.0;
    k_volt_slope_rise            :  0.0;
    k_volt_wire_cap              :  0.0;
    k_volt_wire_res              :  0.0;

    time_unit : "1ns";
    voltage_unit : "1V";
    current_unit : "1uA";
    pulling_resistance_unit : "1kohm";
    capacitive_load_unit (0.1,ff);
        /*********************************************/
        /* Added for DesignPower (Power Estimation). */
        leakage_power_unit : 1nW;
        default_cell_leakage_power : 0.2;
 
        k_volt_cell_leakage_power : 0.000000 ;
        k_temp_cell_leakage_power : 0.000000 ;
        k_process_cell_leakage_power : 0.000000 ;
 
        k_volt_internal_power : 0.000000 ;
        k_temp_internal_power : 0.000000 ;
        k_process_internal_power : 0.000000 ;
 
        power_lut_template(output_by_cap_and_trans) {
          variable_1 : total_output_net_capacitance;
          variable_2 : input_transition_time;
          index_1 ("0.0, 5.0, 20.0");
          index_2 ("0.1, 1.00, 5.00");
        }
 
        power_lut_template(input_by_trans) {
          variable_1 : input_transition_time; 
          index_1 ("0.1, 1.00, 5.00");
        }
 
        /* End of power section (for DesignPower) */
        /******************************************/

    nom_process                  :  1.0;
    nom_temperature 	         : 25.0;
    nom_voltage                  :  5.0;


    operating_conditions(WCCOM) {
	process : 1.5 ;
        temperature : 70 ;
	voltage : 4.75 ;
	tree_type : "worst_case_tree" ;
    }
    operating_conditions(WCIND) {
        process : 1.5 ;
        temperature : 85 ;
        voltage : 4.75 ;
        tree_type : "worst_case_tree" ;
    }
    operating_conditions(WCMIL) {
        process : 1.5 ;
        temperature : 125 ;
        voltage : 4.5 ;
        tree_type : "worst_case_tree" ;
    }
    operating_conditions(BCCOM) {
        process : 0.6 ;
        temperature : 0 ;
        voltage : 5.25 ;
        tree_type : "best_case_tree" ;
    }
    operating_conditions(BCIND) {
        process : 0.6 ;
        temperature : -40 ;
        voltage : 5.25 ;
        tree_type : "best_case_tree" ;
    }
    operating_conditions(BCMIL) {
        process : 0.6 ;
        temperature : -55 ;
        voltage : 5.5 ;
        tree_type : "best_case_tree" ;
    }

    wire_load("05x05") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 0.186 ;
        fanout_length(1,0.39) ;
    }
    wire_load("10x10") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 0.311 ;
        fanout_length(1,0.53) ;
    }
    wire_load("20x20") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 0.547 ;
        fanout_length(1,0.86) ;
    }
    wire_load("30x30") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 0.782 ;
        fanout_length(1,1.40) ;
    }
    wire_load("40x40") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 1.007 ;
        fanout_length(1,1.90) ;
    }
    wire_load("50x50") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 1.218 ;
        fanout_length(1,1.80) ;
    }
    wire_load("60x60") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 1.391 ;
        fanout_length(1,1.70) ;
    }
    wire_load("70x70") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 1.517 ;
        fanout_length(1,1.80) ;
    }
    wire_load("80x80") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 1.590 ;
        fanout_length(1,1.80) ;
    }
    wire_load("90x90") {
        resistance : 0 ;
        capacitance : 1 ;
        area : 0 ;
        slope : 1.64 ;
        fanout_length(1,1.9) ;
    }

cell(AN2) {
  area : 2;
  pin(A) {
    direction : input;
    capacitance : 1;
  }
  pin(B) {
    direction : input;
    capacitance : 1;
  }
  pin(Z) {
    direction : output;
    function : "A B";
    timing() {
      intrinsic_rise : 0.48;
      intrinsic_fall : 0.77;
      rise_resistance : 0.1443;
      fall_resistance : 0.0523;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
    timing() {
      intrinsic_rise : 0.48;
      intrinsic_fall : 0.77;
      rise_resistance : 0.1443;
      fall_resistance : 0.0523;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "B";
    }
  }
		  cell_leakage_power : 1; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 5.000000 ,  15.000000 ,  0.300000 ", \
		           " 1.000000 ,  5.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A B"; 
		  }
}
cell(AN2P) {
  area : 2;
  pin(A) {
    direction : input;
    capacitance : 1;
  }
  pin(B) {
    direction : input;
    capacitance : 1;
  }
  pin(Z) {
    direction : output;
    function : "A B";
    timing() {
      intrinsic_rise : 0.54;
      intrinsic_fall : 0.84;
      rise_resistance : 0.0718;
      fall_resistance : 0.0347;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
    timing() {
      intrinsic_rise : 0.54;
      intrinsic_fall : 0.84;
      rise_resistance : 0.0718;
      fall_resistance : 0.0347;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "B";
    }
  }
		  cell_leakage_power : 1; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 10.000000 ,  30.000000 ,  0.500000 ", \
		           " 5.000000 ,  10.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A B"; 
		  }
}
cell(OR2) {
  area : 2;
  pin(A) {
    direction : input;
    capacitance : 1;
  }
  pin(B) {
    direction : input;
    capacitance : 1;
  }
  pin(Z) {
    direction : output;
    function : "A+B";
    timing() {
      intrinsic_rise : 0.38;
      intrinsic_fall : 0.85;
      rise_resistance : 0.1443;
      fall_resistance : 0.0589;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
    timing() {
      intrinsic_rise : 0.38;
      intrinsic_fall : 0.85;
      rise_resistance : 0.1443;
      fall_resistance : 0.0589;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "B";
    }
  }
		  cell_leakage_power : 1; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 5.000000 ,  15.000000 ,  0.300000 ", \
		           " 1.000000 ,  5.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A B"; 
		  }
}
cell(IV) {
  area : 1;
  pin(A) {
    direction : input;
    capacitance : 1;
  }
  pin(Z) {
    direction : output;
    function : "A'";
    timing() {
      intrinsic_rise : 0.38;
      intrinsic_fall : 0.15;
      rise_resistance : 0.1443;
      fall_resistance : 0.0589;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
  }
		  cell_leakage_power : 1; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 5.000000 ,  15.000000 ,  0.300000 ", \
		           " 1.000000 ,  5.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A"; 
		  }
}
cell(IVP) {
  area : 1;
  pin(A) {
    direction : input;
    capacitance : 2;
  }
  pin(Z) {
    direction : output;
    function : "A'";
    timing() {
      intrinsic_rise : 0.36;
      intrinsic_fall : 0.16;
      rise_resistance : 0.0653;
      fall_resistance : 0.0331;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
  }
		  cell_leakage_power : 1; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 10.000000 ,  30.000000 ,  0.500000 ", \
		           " 5.000000 ,  10.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A"; 
		  }
}
cell(IVA) {
  area : 1;
  pin(A) {
    direction : input;
    capacitance : 1.5;
  }
  pin(Z) {
    direction : output;
    function : "A'";
    timing() {
      intrinsic_rise : 0.24;
      intrinsic_fall : 0.25;
      rise_resistance : 0.0718;
      fall_resistance : 0.0589;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
  }
		  cell_leakage_power : 2; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 10.000000 ,  30.000000 ,  0.500000 ", \
		           " 5.000000 ,  10.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A"; 
		  }
}
cell(IVAP) {
  area : 2;
  pin(A) {
    direction : input;
    capacitance : 3;
  }
  pin(Z) {
    direction : output;
    function : "A'";
    timing() {
      intrinsic_rise : 0.26;
      intrinsic_fall : 0.14;
      rise_resistance : 0.0331;
      fall_resistance : 0.0347;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
  }
		  cell_leakage_power : 1; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 10.000000 ,  30.000000 ,  0.500000 ", \
		           " 5.000000 ,  10.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Z"; 
		     related_inputs : "A"; 
		  }
}
cell(IVDA) {
  pin_opposite("Y", "Z");
  area : 1;
  pin(A) {
    direction : input;
    capacitance : 1;
  }
  pin(Y) {
    direction : output;
    function : "A'";
    timing() {
      intrinsic_rise : 0.55;
      intrinsic_fall : 0.32;
      rise_resistance : 0.1411;
      fall_resistance : 0.0557;
      slope_rise : 0.0;
      slope_fall : 0.0;
      related_pin : "A";
    }
  }
		  cell_leakage_power : 2; 
		  internal_power(output_by_cap_and_trans) { 
		     values(" 10.000000 ,  30.000000 ,  0.500000 ", \
		           " 5.000000 ,  10.000000 ,  0.000000 ", \
		           " 0.000000 ,  0.000000 ,  0.000000 ");
		     related_outputs : "Y"; 
		     related_inputs : "A"; 
		  }
  pin(Z) {
    direction : output;
    function : "A";