readme

来自「design compile synthesis user guide」· 代码 · 共 21 行

This directory contains the source codes, the db files, the script
files and the log file for this ECO tutorial.  They are located in
various sub-directory as below,

1. Source codes in both VHDL and Verilog are found in the ./src directory.
   The source codes of the original design are uwave.v or uwave.vhd.  The
   source codes of the new design with ECO changes are nu_uwave.v or 
   nu_uwave.vhd.

2. The db files (compiled source codes) are found in the ./db directory.
   The old_hdl.db and the old_netlist.db are the hdl and the gate level 
   netlist of the original design.  The old_netlist.db and new_netlist.db
   are the hdl and the gate level netlist of the new design.  The eco_*.db
   are the eco netlist generated at various stage of the ECO flow.

3. The dc_shell script to create the above db files is ./scripts/create_db.scr.

4. The dc_shell script to exercise this tutorial is ./scripts/eco.script.