setenv.script

design compile synthesis user guide

/* design_analyzer script file for Chapter 7 */

/* Read in the design (all designs in the hierarchy) */
/* 	Analyze and elaborate 5 designs in the lowest hierarchy level */
read -format vhdl {"./vhdl/synopsys.vhd"}
analyze -format vhdl -lib WORK {./vhdl/ALARM_COUNTER.vhd, ./vhdl/ALARM_STATE_MACHINE.vhd, ./vhdl/HOURS_FILTER.vhd, ./vhdl/TIME_COUNTER.vhd, ./vhdl/TIME_STATE_MACHINE.vhd}
elaborate ALARM_COUNTER -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate ALARM_STATE_MACHINE -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate HOURS_FILTER -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate TIME_COUNTER -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate TIME_STATE_MACHINE -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
/* 	Read CONVERTOR.pla in the lowest hierarchy level) */
read -format pla {"./vhdl/CONVERTOR.pla"}
create_schematic -size infinite -gen_database
/* 	Analyze and elaborate designs in the second hierarchy level */
analyze -format vhdl -lib WORK {./vhdl/ALARM_BLOCK.vhd, ./vhdl/ALARM_SM_2.vhd, ./vhdl/COMPARATOR.vhd, ./vhdl/CONVERTOR_CKT.vhd, ./vhdl/MUX.vhd, ./vhdl/TIME_BLOCK.vhd}
elaborate ALARM_BLOCK -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate COMPARATOR -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate CONVERTOR_CKT -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate MUX -arch "behavior" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate TIME_BLOCK -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
elaborate ALARM_SM_2 -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database
/* 	Analyze and elaborate the top-level design */
analyze -format vhdl -lib WORK {"./vhdl/TOP.vhd"}
elaborate TOP -arch "BEHAVIOR" -lib WORK -update
create_schematic -size infinite -gen_database

/* current_design "~tutorial/vhdl/TOP.db:TOP" */
create_schematic -size infinite -symbol_view
create_schematic -size infinite -hier_view
create_schematic -size infinite -schematic_view
current_instance "U2"
create_schematic -size infinite -symbol_view -reference
create_schematic -size infinite -hier_view -reference
create_schematic -size infinite -schematic_view -reference 
current_instance ".."

/* Set design attributes*/

set_drive -rise .08 "ALARM"
set_drive -fall .08 "ALARM"
set_drive -rise .08 "HRS"
set_drive -fall .08 "HRS"
set_drive -rise .08 "MINS"
set_drive -fall .08 "MINS"
set_drive -rise .08 "SET_TIME"
set_drive -fall .08 "SET_TIME"
set_drive -rise .08 "TOGGLE_SWITCH"
set_drive -fall .08 "TOGGLE_SWITCH"
set_drive -rise drive_of (class/B4I/Z) "CLK"
set_drive -fall drive_of (class/B4I/Z) "CLK"
set_drive -rise 0.06 "SET_TIME"
set_drive -fall 0.06 "SET_TIME"
set_load load_of (class/IVA/A) * 5 "SPEAKER_OUT"
set_load 3.0 "DISP1[13]"
set_load 3.0 "DISP1[12]"
set_load 3.0 "DISP1[11]"
set_load 3.0 "DISP1[10]"
set_load 3.0 "DISP1[9]"
set_load 3.0 "DISP1[8]"
set_load 3.0 "DISP1[7]"
set_load 3.0 "DISP1[6]"
set_load 3.0 "DISP1[5]"
set_load 3.0 "DISP1[4]"
set_load 3.0 "DISP1[3]"
set_load 3.0 "DISP1[2]"
set_load 3.0 "DISP1[1]"
set_load 3.0 "DISP1[0]"
set_load 3.0 "DISP2[13]"
set_load 3.0 "DISP2[12]"
set_load 3.0 "DISP2[11]"
set_load 3.0 "DISP2[10]"
set_load 3.0 "DISP2[9]"
set_load 3.0 "DISP2[8]"
set_load 3.0 "DISP2[7]"
set_load 3.0 "DISP2[6]"
set_load 3.0 "DISP2[5]"
set_load 3.0 "DISP2[4]"
set_load 3.0 "DISP2[3]"
set_load 3.0 "DISP2[2]"
set_load 3.0 "DISP2[1]"
set_load 3.0 "DISP2[0]"
set_load 2.0 "AM_PM_DISPLAY"

/* Set wire load model and operating conditions*/
set_wire_load "10x10" -library "class"
set_operating_conditions -library "class" "WCCOM"

/* Save the design*/
write -format db -hierarchy -output "./db/TOP_attributes.db" {"TOP.db:TOP"}

quit